Multicore Fixed and Floating-Point System-on-Chip
Copyright 2012 Texas Instruments Incorporated
TMS320C6670 Peripheral Information and Electrical Specifications
213
SPRS689D—March 2012
TMS320C6670
Figure 7-53
GPIO Timing
7.29 Semaphore2
The device contains an enhanced Semaphore module for the management of shared resources of the CorePacs. The
Semaphore enforces atomic accesses to shared chip-level resources so that the read-modify-write sequence is not
broken. The Semaphore block has unique interrupts to each of the CorePacs to identify when that CorePac has
acquired the resource.
Semaphore resources within the module are not tied to specific hardware resources. It is a software requirement to
allocate semaphore resources to the hardware resource(s) to be arbitrated.
The Semaphore module supports 3 masters and contains 32 semaphores to be used within the system.
There are two methods of accessing a semaphore resource:
•
Direct Access:
A CorePac directly accesses a semaphore resource. If free, the semaphore will be granted. If not,
the semaphore is not granted.
•
Indirect Access:
A CorePac indirectly accesses a semaphore resource by writing it. Once it is free, an interrupt
notifies the CPU that it is available.
7.30 Antenna Interface Subsystem 2 (AIF2)
The enhanced Antenna Interface subsystem (AIF2) consists of the Antenna Interface module and two SerDes
macros. The AIF2 relies on the performance SerDes macro (high-speed serial link) along with a logic layer for the
OBSAI RP3 and CPRI protocols. The AIF is used to connect to the backplane for transmission and reception of
antenna data, as well as to connect to additional device peripherals.
The AIF2 has 11 timer synchronization events from the AIF2 Timer (AT) module. Timer synchronization events
0-7 are routed as primary events to the EDMA3CC1 and also as secondary events to the C66x CorePacs via CIC0.
Timer synchronization events 8, 9, and 10 are hard-wired to TAC, RAC_A, and RAC_B respectively.
Table 7-83
AIF2 Timer Module Timing Requirements (Part 1 of 2)
See
,
No.
Min
Max
Unit
RP1 Clock and Frameburst
1
tc(RP1CLKN)
Cycle time, RP1CLK(N)
32.55
32.55
ns
1
tc(RP1CLKP)
Cycle time, RP1CLK(P)
32.55
32.55
ns
2
tw(RP1CLKNL)
Pulse duration, RP1CLK(N) low
0.4 * C1
(1)
0.6 * C1
ns
3
tw(RP1CLKNH)
Pulse duration, RP1CLK(N) high
0.4 * C1
0.6 * C1
ns
3
tw(RP1CLKPL)
Pulse duration, RP1CLK(P) low
0.4 * C1
0.6 * C1
ns
2
tw(RP1CLKPH)
Pulse duration, RP1CLK(P) high
0.4 * C1
0.6 * C1
ns
4
tr(RP1CLKN)
Rise time - RP1CLKN 10% to 90%
350.00
ps
4
tf(RP1CLKN)
Fall time - RP1CLKN 90% to 10%
350.00
ps
GPIx
1
2
GP
O
x
3
4
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