MINCUL P,loc32
6-154
MINCUL P,loc32
Conditionally Find the Unsigned Minimum
SYNTAX OPTIONS
OPCODE
OBJMODE
RPT
CYC
MINCUL P,loc32
0101 0110 0101 1001
xxxx xxxx LLLL LLLL
1
−
1
Operands
P
Product register
loc32
Addressing mode (see Chapter 5)
Description
Based on the state of the N and Z flags, conditionally compare the unsigned
contents of the P register with the 32-bit, unsigned content of the location
pointed to by the “loc32” addressing mode and load the P register with the
smaller of the two numbers:
if( (N = 0) & (Z = 0) )
P = [loc32];
if( (N = 0) & (Z = 1) & (P > [loc32]) )
V=1, P = [loc32];
if( (N = 1) & (Z = 0) )
P = unchanged;
Note:
The “p < [loc32]” operation is treated like a 32-bit unsigned compare.
This instruction is typically combined with the MINL instruction to form a
64-bit minimum function. It is assumed that the N and Z flags will first be set
by using a MINL instruction to compare the upper 32 bits of a 64-bit value.
The MINCUL instruction is then used to conditionally compare the lower 32
bits based on the results of the upper 32-bit comparison.
Flags and
Modes
N
Z
If (N = 1 AND Z = 0), then load the P register with [loc32].
If (N = 0 AND Z =1), compare unsigned and load P with the smaller P register
to [loc32].
If (N = 0 AND Z = 0), do nothing.
V
If (N = 0 AND Z = 1 AND P < [loc32] ) then V is set; otherwise, V is unchanged.
Repeat
This instruction is not repeatable. If this instruction follows the RPT
instruction, it resets the repeat counter (RPTC) and executes only once.
Example
; Saturate 64-bit Var64 as follows:
; if(Var64 > MaxPos64 ) Var64 = MaxPos64
; if(Var64 < MaxNeg64 ) Var64 = MaxNeg64
MOVL ACC,@Var64+2
; Load ACC:P with Var64
MOVL P,@Var64+0
MINL ACC,@M2
; if(ACC:P > MaxPos64) ACC:P = MaxPos64
MINCUL P,@M0
MAXL ACC,@M2
; if(ACC:P < MaxNeg64) ACC:P = MaxNeg64
MAXCUL P,@M0
MOVL @Var64+2,ACC
; Store result into Var64
MOVL @Var64+0,P
Summary of Contents for TMS320C28x
Page 30: ...1 12...
Page 80: ...This page intentionally left blank 2 50 This page intentionally left blank...
Page 269: ...IN loc16 PA 6 112 MOV AL 0 AL 0 UOUT IORegC AL IOspace IORegC AL 10...
Page 308: ...MAXCUL P loc32 6 151 Saturate MOVL Var64 2 ACC Store result into Var64 MOVL Var64 P...
Page 509: ...SUBL ACC P PM 6 352 SUBL ACC P PM ACC S B 11 M X 4 MOVH Y ACC 5 Store Q15 result into Y...
Page 585: ...This page intentionally left blank 7 32 This page intentionally left blank...