Texas Instruments TMS320C28x, Reference Manual, Page: 115 / 695

Visualizing Pipeline Activity
4-9 Pipeline
W
E R2 R1 D2 Instruction D1 F2 F1
−
Note: The opcodes shown in the F2 and D1 columns were chosen for illustrative purposes; they are not the actual opcodes of
the instructions shown.
The pipeline activity in Example 4 − 2 can also be represented by the simplified
diagram in Example 4 − 3. This type of diagram is useful if your focus is on the
path of each instruction rather than on specific pipeline events. In cycle 8, the
pipeline is full: there is an instruction in every pipeline phase. Also, the effective
execution time for each of these instructions is one cycle. Some instructions
finish their activity at the D2 phase, some at the E phase, and some at the W
phase. However, if you choose one phase as a reference, you can see that
each instruction is in that phase for one cycle.
Example 4 − 3. Simplified Diagram of Pipeline Activity
F1 F2 D1 D2 R1 R2 E W Cycle
I1 1
I2 I1 2
I3 I2 I1 3
I4 I3 I2 I1 4
I5 I4 I3 I2 I1 5
I6 I5 I4 I3 I2 I1 6
I7 I6 I5 I4 I3 I2 I1 7
I8 I7 I6 I5 I4 I3 I2 I1 8
I8 I7 I6 I5 I4 I3 I2 9
I8 I7 I6 I5 I4 I3 10
I8 I7 I6 I5 I4 11
I8 I7 I6 I5 12
I8 I7 I6 13
I8 I7 14
I8 15