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6.8
Audio Interface Tab
Kit Operation
The MIC3L and MIC3R inputs are similar to the LINE1L and LINE1R inputs in that they can be routed to
either ADC input channel. Control of the mic bias is accomplished by using the pull-down menu at the top
of these channel strips. The mic bias can either be powered down or set to 2.0V, 2.5V, or the power
supply voltage of the ADC (AVDD_ADC).
To use the on-board microphone, JMP2 and JMP3 must be installed and nothing should be plugged into
J6. In order for the mic bias settings in the software to take effect, JMP1 should be set to connect
positions 2 and 3, so that mic bias is controlled by the TLV320AIC33.
In the upper right of this tab are controls for Weak Common Mode Bias. Enabling these controls will
result in unselected inputs to the ADC channels to be weakly biased to the ADC common mode voltage.
Below these controls are the controls for the ADC PGA—the master volume controls for the ADC inputs.
Each channel of the ADC can be powered up or down as needed using the Powered Up buttons. PGA
soft-stepping for each channel is selected using the control below this. The large knobs set the actual
ADC PGA Gain; at the extreme counterclockwise rotation, the channel is muted. Rotating the knob
clockwise increases the PGA gain.
The Audio Interface tab (
) sets up the audio data interface to the TLV320AIC33. For use with the
PC software and the USB-MODEVM, the default settings should be used. If using an external I
2
S source,
or other data source, the interface mode may be selected using the Transfer Mode control—selecting
either I
2
S mode, DSP mode, or Right- or Left-Justified modes. Word length can be selected using the
Word Length control, and the bit clock rate can also be selected using the Bit Clock rate control. The
Data Word Offset, used in TDM mode (see the
) can also be selected on this tab.
TLV320AIC33EVM and TLV320AIC33EVM-PDK User's Guide
16
SBAU114 – November 2005