V
IO
100 nF
CANH
CANL
3.3 V
TCAN1044VA
TLIN14315-Q1
V
DD33
V
SUP
V
SUP
V
BAT
V
BAT
DIV_ON
PV
20 pF
500 k
3.3 V
LDO
INH/
WKRQ
1 M
1 M pull-down or
leave floating for INH
100 nF
470
V
CC
= 5V
Micro
nCS
CLK
SDI
SDO
TXD
RXD
FSO
STB
LIN
TXD
RXD
LIMP
HSS
WAKE
100 nF
nINT
I/O
V
DD
LIN Controller
Or
SCI/UART
CAN
Controller
nRST
10 k
V
DD
10 µ F
V
CC
Figure 2-4. Channel Expansion with CAN Transceiver
Note that the VCC and FSO pins are logic-level voltages, while the HSS and VSUP signals are high-voltage
outputs. Use care when implementing these outputs to ensure the proper voltage design requirements are met.
2.5 V
BAT
Voltage Divider
To activate the internal V
BAT
voltage divider on the TLIN1431-Q1, apply a high signal on DIV_ON using the
appropriate pin on J4. By default, an internal pull-down deactivates the internal voltage divider when the pin is
left floating.
The output of the voltage divider can be measured on PV.
2.6 Reset Input
Push-button nRST interfacing is possible using S2 on the EVM. Pressing S2 delivers a strong pull-down to the
active-low nRST pin.
2.7 Logic-Level LIMP and WAKE Signals
This EVM implements on-board comparators to provide logic-level outputs representing the states of LIMP and
WAKE respectively, which are high-voltage signals for the device. These are provided as “LIMP_MCU” and
“WAKE_MCU” on J4, thus configuring all J4 signals as logic-level, and potentially capable of being connected to
general-purpose inputs on an external micro controller.
Note that LIMP_MCU and WAKE_MCU are outputs, and are not connected to LIMP and WAKE. Thus, for
example. a signal cannot be applied to WAKE_MCU that would impact the high-voltage WAKE signal on the
TLIN1431-Q1.
EVM Setup and Features
SLLU326 – MAY 2022
TLIN1431EVM User's Guide
7
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