Texas Instruments TIDA-050026-23881, Design Manual, Page: 5 / 24

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System Overview
5 SLVUBN3A – May 2019 – Revised October 2019
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24-Port (4 Pair) Power Sourcing Equipment Reference Design for Multi-port
Applications
Table 2. MSP430 GPIO Pin Assignment (continued)
PIN NUMBER
MSP430F5234 (48RGZ)
TERMINAL FUNCTION COMMENT
17 P1.4 OSS PSE OSS Connect to PSE OSS pin
46 P6.0 Interrupt pin to host
35 P4.6 BSL mode indication to host MCU configures as output. If MCU is in BSL mode,
output high. If in normal operation mode, output low.
48 P6.2 Guard-band indication Need an external LED
47 P6.1 Selection between I2C and
SPI, UART Need to pullup or pulldown
PROGRAM DOWNLOAD AND DEBUG
44 PJ.3 TCK JTAG clock input
43 PJ.2 TMS JTAG state control
42 PJ.1 TDI/TCLK JTAG data input, TCLK input
41 PJ.0 TDO JTAG data output
40 TEST/SBWTCK Enable JTAG pins
45 RSTDVCC/SBWTDIO External reset
EXTERNAL CRYSTAL
7 P5.4 XTIN External low frequency clock (use if needed)
8 P5.5 XTOUT External low frequency clock (use if needed)
Pre-configure the host interface protocol through hardware as Table 3 shows.
Table 3. Host Interface Protocol
P6.1 CS (P3.2)
I2C high Don’t care
UART low low
SPI (CS ActiveLow) low high
2.3 Highlighted Products
2.3.1 TPS23881
The TPS2388x device is the main IC to handle PoE functions to deliver power to PDs through Ethernet
cable.
The TPS23881 device is an 8-channel power sourcing equipment (PSE) controller engineered to insert
power onto Ethernet cables in accordance with the IEEE 802.3bt (draft) standard. The eight individual
power channels can be configured in any combination of 2-pair (1-channel) or 4-pair (2-channels) PoE
ports. The PSE controller can detect PDs that have a valid signature, determine the power requirements
of the devices according to their classification, and apply power.
Programmable SRAM enables in field firmware upgradability over I2C to ensure IEEE compliance and
interoperability with the latest PoE enabled devices.
Dedicated per-port ADCs provide continuous port current monitoring and the ability to perform parallel
classification measurements for faster port turn on times. A ±2.5%accurate programmable port power limit
provides the ability to expand the maximum power sourced to 95 W without exceeding 100 W, and for
non-standard applications, the power limit may be set as high as 125 W. The 200-m
Ω current sense
resistor and external FET architecture allows designs to balance size, efficiency, thermal, and solution
cost requirements.
Port remapping and pin-to-pin compatibility with the TPS23880 and TPS2388 devices eases migration
from previous generation PSE designs and enables interchangeable 2-layer PCB designs to
accommodate different system PoE power configurations.