Texas Instruments THS4151 User Manual Download Page 25

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General High-Speed Amplifier Design Considerations

 

General High-Speed Amplifier Design

Considerations

The THS4151 EVM layout has been designed for use with high-speed signals
and can be used as an example when designing PCBs incorporating the
THS4151. Careful attention has been given to component selection,
grounding, power supply bypassing, and signal path layout. Disregarding
these basic design considerations could result in less than optimum
performance of the THS4151 high-speed operational amplifier.

Surface-mount components were selected because of the extremely low lead
inductance associated with this technology. This helps minimize both stray
inductance and capacitance. Also, because surface-mount components are
physically small, the layout can be very compact.

Tantalum power supply bypass capacitors at the power input pads help supply
currents needed for rapid, large signal changes at the amplifier output. The
0.1-

µ

F power supply bypass capacitors were placed as close as possible to

the IC power input pins in order to minimize the return path impedance. This
improves high frequency bypassing and reduces harmonic distortion.

A proper ground plane on both sides of the PCB should be used with
high-speed circuit design. This provides low-inductive ground connections for
return current paths. In the area of the amplifier input pins, however, the
ground plane should be removed to minimize stray capacitance and reduce
ground plane noise coupling into these pins. This is especially important for
the inverting pin while the amplifier is operating in the noninverting mode.
Because the voltage at this pin swings directly with the noninverting input
voltage, any stray capacitance would allow currents to flow into the ground
plane. This could cause possible gain error and/or oscillation. Capacitance
variations at the amplifier input pin of greater than 1 pF can significantly affect
the response of the amplifier.

In general, it is best to keep signal lines as short and as straight as possible.
Incorporation of microstrip or stripline techniques is also recommended when
signal lines are greater than 1 inch in length. These traces must be designed
with a characteristic impedance of either 50 

 or 75 

, as required by the

application. Such a signal line must also be properly terminated with an
appropriate resistor.

Chapter 3

Summary of Contents for THS4151

Page 1: ...THS4151 EVM User s Guide for High Speed Fully Differential Amplifier February 2001 Mixed Signal Products User s Guide SLOU109...

Page 2: ...esign TI does not warrant or represent that any license either express or implied is granted under any patent right copyright mask work right or other intellectual property right of TI covering or rel...

Page 3: ...It is recommend that the user initially review the datasheet of the device under test It is also helpful to review the schematic and layout of the THS4151 EVM to determine the design techniques used i...

Page 4: ...HS4151 data sheet literature number SLOS321 THS4151 application report literature number SLOA054A Fully Differential Amplifiers FCC Warning This equipment is intended for use in a laboratory test envi...

Page 5: ...Configuration 1 3 1 5 THS4151 EVM Schematic 1 4 1 6 Additional Sample Schematics 1 5 1 7 THS4151 EVM Layout 1 7 2 Using the THS4151 EVM 2 1 2 1 Required Equipment 2 2 2 2 Power Supply Setup 2 2 2 3 I...

Page 6: ...ansformer 1 5 1 5 VICR Level Shifter 1 6 1 6 Butterworth Filter With Multiple Feedback 1 6 1 7 Top Layer Silkscreen 1 7 1 8 Top Layer 1 Signals 1 7 1 9 Internal Plane Layer 2 Ground Plane 1 8 1 10 Int...

Page 7: ...of the EVM In addition the schematic of the default circuit has been added to depict the components mounted on the EVM when it is received by the customer This configuration correlates to the single...

Page 8: ...h a 50 resistor to provide correct line impedance matching 1 2 Evaluation Module Features THS4151 high speed operational amplifier EVM features include J Voltage supply operation range 5 V to 15 V ope...

Page 9: ...see the THS4151 data sheet TI literature number SLOS321 1 4 Schematic of the Populated Circuit Default Configuration For verification of jumper locations and other bypass components see the complete...

Page 10: ...THS4151 EVM Schematic 1 4 Introduction and Description 1 5 THS4151 EVM Schematic Figure 1 2 Schematic...

Page 11: ...mination Resistor R3a R6b Note Fully differential in fully differential out signal path See the Texas Instruments February 2001 Analog Applications Journal for the information on the termination resis...

Page 12: ...C RPU1 RPU2 VCC Note Shiftingthe VICR within the specified range in the data sheet via RPU1 and RPU2 if the VICR is out of the specified range See the Application section of the data sheet for the THS...

Page 13: ...51 EVM Layout 1 7 Introduction and Description 1 7 THS4151 EVM Layout Figure 1 7 Top Layer Silkscreen TEXAS INSTRUMENTS THS4151 EVM REV_B Figure 1 8 Top Layer 1 Signals TEXAS INSTRUMENTS THS4151 EVM R...

Page 14: ...THS4151 EVM Layout 1 8 Introduction and Description Figure 1 9 Internal Plane Layer 2 Ground Plane Figure 1 10 Internal Plane Layer 3 VCC Plane...

Page 15: ...THS4151 EVM Layout 1 9 Introduction and Description Figure 1 11 Bottom Layer 4 Ground and Signal...

Page 16: ...1 10 Introduction and Description...

Page 17: ...terminals on the EVM and their function In addition it suggests the components and equipment needed to operate the EVM Topic Page 2 1 Required Equipment 2 2 2 2 Power Supply Setup 2 2 2 3 Input and O...

Page 18: ...dc power supply to 5 V 2 Make sure the dc power supply is turned off before proceeding to the next step 3 Connect the positive terminal of the power supply to the positive terminal of the current mete...

Page 19: ...erator to J1 VI on the EVM 5 Using a BNC to SMA cable connect the oscilloscope to J3 VO on the EVM 6 Using a BNC to SMA cable connect the oscilloscope to J4 VO on the EVM Set the oscilloscope to 0 5 V...

Page 20: ...rn on the function generator 4 Verify the oscilloscope is showing two 1 MHz sine waves with amplitude of 0 125 V The dc offset of the signal must be below 50 mV Note VOUT and VOUT should be 180 degree...

Page 21: ...sider the following steps to ensure optimal performance in terms of bandwidth phase margin gain and peaking 1 Connect the power supply according to the power supply set up section 2 2 2 Use proper loa...

Page 22: ...center point of the power supply For example if 5 sources are used the VOCM level will be set to zero 2 7 Butterworth Filter An example of a Butterworth filter implemented with multiple feedback archi...

Page 23: ...r C1 C4 C5 C6 Capacitor 0 1 F ceramic 0805 4 Murata GRM40 X7R104K25 C7 C8 Capacitor 6 8 F 35 V 20 tantalum SM 7343 2 Sprague 293D685X9035D2T C1A C1B C2 C3A C3B Open 0805 5 J1 J2 J3 J4 SMT_PCB_MT SMA j...

Page 24: ...sistor 402 1 0805 2 Digi Key P402CTR ND R11 Resistor 10 k 1 0805 1 Digi Key P10 KCTR ND R10 RX3 RX6 Resistor 49 9 1 1206 3 Digi Key P49 9FTR ND R16 R7 Open 1206 2 R36aA R36aB R36bA R36bB High precisio...

Page 25: ...nce This improves high frequency bypassing and reduces harmonic distortion A proper ground plane on both sides of the PCB should be used with high speed circuit design This provides low inductive grou...

Page 26: ...g a transmission line with its characteristic impedance the amplifier s load then appears to be purely resistive and reflections are absorbed at each end of the line Another advantage of using an outp...

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