Schematic, PCB Layout, and Bill of Materials
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10
SBOU161A – February 2016 – Revised April 2016
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Copyright © 2016, Texas Instruments Incorporated
THS3215EVM and THS3217EVM
3.2
PCB Layout
The PCB layers are shown in
Figure 8
through
Figure 13
.
Figure 8. Layer 1: Top Signal Layer
Figure 9. Layer 2: GND Plane
