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Texas Instruments   4Q 2006

Interface Selection Guide

Texas Instruments (TI) provides complete interface solutions that empower you to differentiate your products and accelerate time-to-market. 
Our expertise in high-speed, mixed-signal circuits, system-on-a-chip integration and advanced product development processes ensures you will
receive the silicon, support tools, software and technical documentation to create and deliver the best products on time and at competitive prices.
Included in this selection guide you will find design considerations, technical overviews, graphic representation of portfolios, parametric tables
and resource information on the following families of devices: 

LVDS:

(p. 4) TIA/EIA-644A specification

designed for differential transmission 
delivering signaling rates into the Gbps range
and power in the mW range with low EMI to
the telecommunication and consumer markets.

xECL:

(p. 4) Emitter coupled logic (xECL), 

high-speed differential interface technology
designed for low jitter and skew. 

CML:

(p. 4) Current-mode logic (CML), high

speed differential interface technology.

M-LVDS:

(p. 8) TIA/EIA-899 specification with

all the benefits of LVDS applicable to multi-
point bus architecture in backplanes. Used
often for clock distribution, e.g. AdvancedTCA.

Digital Isolators:

(p. 10) The new ISO72x

high-speed digital isolators use state-of-the-art
integrated capacitive coupling and silicon-
dioxide isolation barrier to provide up to 
150-Mbps signaling rate with only 1-ns jitter,
best-of-class noise immunity and high reliability.

RS-485/422:

(p. 11) Robust TIA/EIA-485 and 

TIA/ EIA-422 specifications specially designed
for harsh, industrial environments transmitting
a differential signal up to 50 Mbps or 1.2 km.

RS-232:

(p. 13) TIA/EIA-232 specification 

defining single-ended interface between data 
terminal equipment (DTE) and data circuit-
terminating equipment (DCE).

UARTs:

(p. 16) Universal Asynchronous

Receiver/Transmitters are the key logic compo-
nent of serial communication utilizing RS232,
RS485/422 or LVDS transceivers to transmit or
receive between remote devices performing 
parallel to serial conversion in the transmit
process and serial to parallel conversion in the
receive process.

CAN:

(p. 18) Controller Area Network

(ISO11898) specification commonly used in
automotive and industrial applications describes
differential signaling at a rate up to 1 Mbps on
a 40-meter bus with multipoint topology. 

CardBus Power Switches:

(p. 34) The

CardBus controller uses the card detect and
voltage sense pins to determine a PC card’s
voltage requirements and then directs the
PCMCIA power switch to enable the proper
voltages. Standard PC cards require that V

CC

be switched between ground, 3.3 V, and 5 V,
while VPP is switched between ground, 3.3 V,
5 V, and 12 V. CardBay sockets have the stan-
dard requirements for VCC, but require ground,

3.3 V, and 5 V to VPP, and ground, 1.8 V, or 3.3
V to V

CORE

. Other PC card applications may

simply not need 12 V or VPP while still having
the standard requirements for V

CC

. Therefore, 

consider the voltage requirements of the 
application when selecting a PCMCIA 
power switch.

1394:

(p. 36) IEEE 1394 (FireWire

®

) high-speed

interconnection enables simple, low-cost,
high-bandwidth, real-time data connectivity
between computers, peripherals and consumer
electronics.

GTLP:

(p. 39) Gunning transceiver logic plus

(GTLP) derived from the JEDEC JESD8-3 GTL
standard is a reduced-voltage-swing 
technology designed for high-speed interface
between cards operating at LVTTL logic levels
and backplanes operating at GTLP signal levels.

VME:

(p. 41) The VMEbus™ is a standardized,

64-bit, backplane architecture that is coordi-
nated and controlled by VITA. VME is used 
extensively in military, industrial and aerospace
applications.

Clock Distribution Circuits:

(p. 42)

TI offers both single-ended and differential
clock buffers that perform from below 200 MHz
up to 3.5 GHz in a variety of fan-out options. In
addition to simple option for customers needing 
differential signals (LVPECL) and single-ended
signals (LVTTL/LVCMOS) from the same device.

FlatLink™ 3G:

(p. 19) A new family of serial-

izers and deserializers designed for mobile
phone displays.

SerDes:

(p. 20) Serializers and deserializers 

in the gigabit range designed to bridge large
numbers of data bits over a small number of
data lines in telecommunication applications.

DVI/PanelBus™:

(p. 22) The Digital Visual

Interface Specification, DVI, is an industry
standard developed by the Digital Display
Working Group (DDWG) for high-speed digital
connection to digital displays. DVI uses 
transition-minimized DC balanced (TMDS) 
data signaling.

TMDS:

(p. 24) Transition minimized differential

signaling is the electrical interface used by DVI
and HDMI.

USB Hub Controllers and Peripheral
Devices:

(p. 25) The USB standard was 

established to make connecting PCs, peripher-
als and consumer electronics flexible and easy.
The hub controller manages USB port connect/
disconnect activities and a peripheral controller
enables USB connectivity of a peripheral
device to either a host or hub.

USB Port Protection:

(p. 26) Transient voltage

suppressor protects USB 1.1 devices from ESD
and electrical noise transients.

USB Power Managers:

(p. 27) TI products,

like TPS204xA and TPS205xA, are designed to
meet all the USB 1.0 and 2.0 requirements for
current-limiting and power switching to reliably
control the power on the voltage bus.

PCI Express

®

:

(p. 29) A robust, scalable, 

flexible and cost-effective I/O interconnect.

PCI Bridges:

(p. 33) A peripheral component

interconnect (PCI) bridge provides a high-
performance connection path between either
two PCI buses or a PCI component and one or
more DSP devices.

Interface Selection Guide

Introduction

3

Summary of Contents for Technology for Innovators 4Q 2006

Page 1: ...Technology for Innovators TM Interface Selection Guide 4Q 2006...

Page 2: ...G 19 SerDes Serial Gigabit Transceivers and LVDS 20 DVI PanelBus 22 TMDS 24 USB Hub Controllers and Peripheral Devices 25 USB Port Protection 26 USB Power Managers 27 PCI Express 29 PCI Bridges 33 Car...

Page 3: ...en ground 3 3 V 5 V and 12 V CardBay sockets have the stan dard requirements for VCC but require ground 3 3 V and 5 V to VPP and ground 1 8 V or 3 3 V to VCORE Other PC card applications may simply no...

Page 4: ...P Link Using LVDS SLLA107 Live Insertion with Differential Interface Products SLLA147 Suitable LVDS Architectures Resources For a complete list of resources evaluation modules data sheets and applicat...

Page 5: ...nded diff inputs SN65LVP20 2 5 V 3 3 V LVPECL 1 1 LVPECL LVPECL 4000 10 130 0 63 45 3 8QFN 4 40 LVDS CML 1 Supply voltage for all devices listed above is 3 3 V 2 Integrated termination available 100 S...

Page 6: ...LVDS LVTTL LVDS LVTTL 400 1 7 SN65LVDS1050 Transceiver with 2 7 V Supply 2 2 LVDS LVTTL LVTTL LVDS 400 1 7 SN65LVDS22 Multiplexed LVDS Repeater 2 2 LVDS LVDS 250 4 Quad SN65LVDS047 Driver with Flow Th...

Page 7: ...12 3 3 16SOIC 16TSSOP 2 00 SN65LVDS1050 3 7 20 12 2 7 16TSSOP 2 00 SN65LVDS22 4 20 12 3 3 16SOIC 16TSSOP 2 80 Quad Family SN65LVDS047 26 8 3 3 16SOIC 16TSSOP 1 30 SN65LVDS31 35 8 3 3 16SOIC 16TSSOP 1...

Page 8: ...ver thresholds 50 mV vs 100 mV LVDS Driver edge rate control 1 ns min allows ease of stub design Contention provisions Driver short circuit limited to 43 mA Drivers receivers and disabled devices must...

Page 9: ...6 180 8 64TSSOP 4 75 SN65MLVD082 8 8 2 Half LVTTL LVDS LVTTL M LVDS 250 1000 2 4 6 180 8 64TSSOP 4 75 SN65LVDM179 1 1 Full LVTTL LVDM LVTTL LVDM 500 1000 1 7 3 7 15 12 8SOIC 1 70 8VSSOP SN65LVDM0502 2...

Page 10: ...er solutions such as a restricted operating temperature along with new concerns such as the absence of a fail safe output an inability to operate with DC only signals and concerns associated with susc...

Page 11: ...s on the bus line However there are reduced unit load devices available that can support up to 256 devices Termination A multipoint bus architecture requires termination at both ends of the bus line T...

Page 12: ...256 8 SOIC 1 80 No HVD379 Balanced Receivers Ideal for Interbus 25 15 None 256 8 SOIC 1 95 DE RE HVD33 3 3V Supply with Enables 25Mbps 25 15 Short Open Idle 64 14 SOIC 1 85 DE RE HVD34 3 3V Supply wit...

Page 13: ...232 devices Data rates meet or exceed today s high speed application requirements Flexible power saving options enable longer battery life Wide portfolio permits selection of the right form fit and f...

Page 14: ...0 51 MAX207 120 5 3 15KV HBM 5 20 24SOIC 24SSOP 0 63 MAX208 120 4 4 15KV HBM 5 20 24PDIP 24SOIC 24SSOP 0 96 MAX211 120 4 5 15KV HBM 5 20 28SOIC 28SSOP 0 63 MAX222 120 2 2 15KV HBM 5 10 18PDIP 18SOIC 0...

Page 15: ...SN75189A 120 4 5 26 14PDIP 14SO 14SOIC 0 22 SN752232 120 6 10 5 50 48SSOP 48TSSOP 0 90 SN75C1154 120 4 4 12 5 20PDIP 20SO 20SOIC 0 76 SN75C189 120 4 5 0 7 14PDIP 14SO 14SOIC 0 31 SN75C189A 120 4 5 0...

Page 16: ...ssion rate For example the TL16C550D UART contains a 16 byte buffer enabling it to support higher sustained transmission rates than the older 8250 UART To reduce software buffering and data overruns T...

Page 17: ...l interface characteristics Available packages DIP PLCC TQFP and QFN Applications PDAs MP3 players Gaming systems Modems Serial ports Telecom TL16C550D Asynchronous Communications Element Get samples...

Page 18: ...specification describes a twisted wire pair bus with 120 W characteristic impedance Zo and differential signaling rate of up to 1 Mbps on a 40 meter bus with multi drop topology Selection Guide Standa...

Page 19: ...k 3G Selection Guide XGA SVGA VGA HVGA QVGA Tx LVDS301 Rx LVDS302 Tx LVDS303 Rx LVDS304 Tx LVDS305 Rx LVDS306 QVGA 240 320 640 200 CIF 352 416 352 440 HVGA 320 480 800 250 640 320 VGA 480 640 1024 320...

Page 20: ...1023A 1224B 100 to 660 Mbps 10 1 LVDS SerDes SerDes Solutions Frontplane Backplane The serial gigabit transceiver family of devices from TI provides low power dissipa tion while enabling multigigabit...

Page 21: ...Ethernet Xcvr TLK2208B Eight Ch of 10 1 Gigabit 1 0 1 3 Gbps 8 VML 4 5 Bit Ch Nibble 1 W JTAG MDIO Supported 31 50 Ethernet Xcvr DDR Mode 8 10 Bit Ch Multiplex Ch Mode TLK2226 Six Ch 16 1 Gigabit 1 0...

Page 22: ...onsiderations The Digital Visual Interface DVI Specification is an industry standard devel oped by the Digital Display Working Group DDWG for high speed digital connection to digital displays DVI uses...

Page 23: ...ts and app reports at www ti com sc device TFP510 or www ti com sc device TFP513 The TFP510 and TFP513 provide a universal interface allowing a glue less connection to most commonly available graphics...

Page 24: ...ent to the minimum jitter budget between transmitter and receiver ESD External connectors being exposed to the outside world are especially susceptible to electrostatic discharge A higher ESD rating p...

Page 25: ...nous and isochronous real time data transmission over a simple and inexpensive 4 wire cable to meet requirements of peripherals including keyboards mice printers speakers scanners external storage dev...

Page 26: ...Yes 80 TQFP USB 2 0 high speed low power ATA ATAPI bridge solution 2 80 Voltage Local Bus Device Speed V Package Interface Description Price USB On The Go OTG TUSB6020 High 1 5 1 8 3 3 80 QFP VLYNQ US...

Page 27: ...S207x family provides the complete power solution for 4 port self powered bus powered or hybrid USB hubs by incorporating current limited switches for four ports a 3 3 V 100 mA LDO a 5 V LDO controlle...

Page 28: ...6 2 1 1 70 2 7 to 5 5 50 Each Yes L H 0 75 TPS2063 7 3 1 1 70 2 7 to 5 5 65 Each Yes L H 0 90 Bus Powered Self Powered Number Bus Power VIN rDS on Current rDS on Current LDO of Switch Indicator min m...

Page 29: ...ure Gen II promises much higher transfer rates using higher frequency signaling technologies Supports multiple interconnect widths via 1 2 4 8 12 16 and 32 lane configura tions aggregated to match app...

Page 30: ...puts 33 MHz or 66 MHz Reduces external components costs and premium board space 32 bit secondary PCI bus with 33 MHz or 66 MHz clocking option Customizes to meet the needs of high performance or low p...

Page 31: ...the PCI Express base specifica tions and is backwards compatible with the PCI Local Bus Specification Rev 2 3 Key Features PCI Express fan out switch with x1 upstream port and three x1 downstream por...

Page 32: ...recover interpolate the clock on the receiver side based on the transitions guaranteed by the use of the 8B 10B mechanism and supply this to the receive side of the data link layer logic In addition t...

Page 33: ...on CompactPCI hot swap functionality 3 3 V core logic with 3 3 to 5 V PCI signaling compatibility Intel bridge compatibility Transparent bridging Literature Number Description Application Notes SCPA02...

Page 34: ...connections They are ideal for power sequencing or segmentation To minimize voltage drop select devices with the lowest rDS on or Drain to Source on resistance Power MUX ICs Power MUX ICs are designed...

Page 35: ...2 7 to 5 5 85 Yes Yes 2H 1L 1H 2L 0 65 TPS2095 6 71 4 0 3 ea 80 2 7 to 5 5 85 Yes Yes 4H 2L 2H 4L 1 05 Number 3 3 V rDS on 5 0 V rDS on IOS Device Interface of Ports typ m typ m min A Predecessor Pri...

Page 36: ...ed is the amount of data buffer memory supported Typically the more bandwidth an application requires or the more simultaneous isochronous asynchronous traffic that needs to be supported the larger th...

Page 37: ...ith POF TI1394b is bi lingual communicates in 1394a and 1394b modes More cabling options STP CAT5 POF GOF More efficient BOSS arbitration More user friendly loop free build allows any topology and red...

Page 38: ...iver Arbiter TSB81BA3D Get samples datasheets and app reports at www ti com sc device TSB81BA3D TPA2 TPA2 TPB2 TPB2 TPA1 TPA1 TPB1 TPB1 TPB0 TPB0 Bilingual Cable Port 0 Bilingual Cable Port 1 Bilingua...

Page 39: ...ely clamps any overshoots that are caused by improperly terminated backplanes unevenly distributed cards or empty slots OEC on the rising and falling edge of the GTLP outputs reduces line reflections...

Page 40: ...16 Bit LVTTL to GTLP Adjustable Edge Rate Bus Transceiver 3 30 SN74GTLPH1655 16 Bit LVTTL to GTLP Adjustable Edge Rate Universal Bus Transceiver 5 25 SN74GTLPH16612 18 Bit LVTTL to GTLP Universal Bus...

Page 41: ...AS VCC Speed Signal Integrity High speed backplane operation is a direct result of the improved OEC circuitry that has been tested on the standard VME backplane Furthermore signal integrity is not com...

Page 42: ...Interface Selection Guide Texas Instruments 4Q 2006 Clock Selection by Speed and Signaling Type Clock Selection by Number of Outputs and Signaling Type 42 Clock Distribution Circuits...

Page 43: ...23 ICL3223E MAX3223 ICL3232 MAX3232 ICL3232E MAX3232 ICL3238 MAX3238 ICL3238E MAX3238 ICL3243 MAX3243 ICL3243E MAX3243 ISL1483 SN65HVD3082E ISL1483 SN65LBC184 ISL1487 SN65HVD06 ISL1487 SN65HVD21 ISL14...

Page 44: ...232 MAX3232 MAX3232E MAX3232 MAX3238 MAX3238 MAX3238E MAX3238 MAX3243 MAX3243 MAX3243E MAX3243 MAX3362 SN75HVD10 MAX3443E SN75LBC184 MAX3463 SN65HVD1176 MAX3464 SN65HVD3082E MAX3464 SN75HVD05 MAX3483...

Page 45: ...010A SN65MLVD200 DS92LV010A SN65MLVD201 DS92LV010A SN65MLVD204 DS92LV010A SN65MLVD206 DS92LV090 SN65LVDM976 DS92LV090 SN65LVDM977 DS92LV090A SN65LVDM976 DS92LV090A SN65LVDM977 DS92LV1010 SN65MLVD201 D...

Page 46: ...PCI12050B PCI6140 PCI2250 PROLIFIC PL 2303 TUSB3410 SEMTECH SC5825 TPS2041A 51A SC5826 TPS2042A 52A SILICON LABORATORIES CP2101 TUSB3410 CP2102 TUSB3410 SILICONIX VISHAY Si9711 TPS2211A Si9712 TPS221...

Page 47: ...5LVDS9637 6 7 SN65LVDS9638 6 7 SN65LVP16 17 5 SN65LVP18 19 5 SN65LVP20 5 42 SN65MLVD047 9 SN65MLVD080 9 SN65MLVD082 9 SN65MLVD128 9 SN65MLVD129 9 SN65MLVD2 9 SN65MLVD200A 9 SN65MLVD201 9 42 SN65MLVD20...

Page 48: ...ility established by the Private Securities Litigation Reform Act of 1995 These forward looking statements generally can be identified by phrases such as TI or its management believes expects anticipa...

Page 49: ...m TI to use such products or services or a warranty or endorsement thereof Use of such information may require a license from a third party under the patents or other intellectual property of the thir...

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