Texas Instruments TAS5753MD, User Manual, Page: 21 / 28

FROM
PurePath
Console Mother Board
BTL_R+
BTL_L-
BTL_R-
0.01µF C20
PDN
LRCLK
SCLK
SDIN
SCL
SDA
RST
18.0k
R3
GND
PVDD
BTL_L+
J1
OUT
GND
GND
GND
OUTA1
OUTD1
MCLK
GND GND GND
+3.3V
4700pF C14
GND
0.047µF
C13
4700pF C12
470
R1
4.7µF C19
0.1µF C18
1µF C17
GND
0.1µF
C10
0.1µF
C8
GND GND GND
PVDD
0.047µF
C15
OUTB1
OUTB1
OUTA1
470
R2
BSTA2
BSTB2
BSTC2
BSTD3
4.7µF
C7
GND
SCL
SDA
ADR1/FAULT
DR_SD
RST
MCLK
SDIN
ADR1/FAULT
220µF
C1
4.7µF
C9
220µF
C2
0.1µF
C3
0.1µF
C4
2200pF
C11
GND
GND
0.01µF C21
OUTC1
0.01µF C22
OUTC1
0.01µF C23
OUTD1
GND
GND
DR_INA
DR_INB
PDN
GND
0.1µF
C6
4.7µF
C5
GND
+3.3V +3.3V
1.5µF
C32
1.5µF
C33
10.0k
R5
10.0k
R4
DR_INA
DR_SD
0.1µF C16
1µF
C31
10.0k
R7
10.0k
R6
0.68µF
C24
C26
DNP
DNP
0.68µF
C25
0.68µF
C27
0.68µF
C28
C29
DNP
DNP
DR_INB
1000pF
C34
DNP DNP
1000pF
C35
DNP DNP
220pF
C36
DNP DNP
220pF
C37
DNP DNP
GND
DRIVER
1µF
C30
LRCLK
SCLK
DRCP
DRCN
DRIN_A
DRIN_B
DRVSS
2nd ORDER
LPF OPTION
DR_OUTA
DR_OUTB
J2
OUT
PGND
1
SPK_OUTA
2
BSTRPA
3
PVDD
4
TEST1
5
TEST2
6
DR_INA
7
DR_OUTA
8
DR_OUTB
9
DR_INB
10
DR_VSS
11
DR_CN
12
DR_CP
13
DRVDD
14
PLL_GND
15
PLL_FLTM
16
PLL_FLTP
17
AVDD_REG1
18
AVDD
19
ADR/FAULT
20
MCLK
21
OSC_RES
22
OSC_GND
23
DVDD_REG
24
PDN
25
LRCLK
26
SCLK
27
SDIN
28
SDA
29
SCL
30
NC
31
RST
32
TEST3
33
DVDD
34
DGND
35
AGND
36
AVDD_REG2
37
SSTIMER
38
DR_SD
39
GVDD_REG
40
PVDD
41
BSTRPD
42
SPK_OUTD
43
PGND
44
SPK_OUTC
45
BSTRPC
46
BSTRPB
47
SPK_OUTB
48
PAD
49
U1
TAS5753MDDCAR
15µH
L1
15µH
L2
15µH
L3
15µH
L4
Copyright © 2016, Texas Instruments Incorporated
www.ti.com
Board Layout, Bill of Materials, and Schematic
21 SLAU683 – May 2016
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Copyright © 2016, Texas Instruments Incorporated
TAS5753MD Evaluation Module
4.3 Schematic
Figure 19 through Figure 21 show the TAS5753MDEVM schematics.
Figure 19. TAS5753MDEVM Stereo Device