Texas Instruments TAS5152K8EVM User Manual Download Page 15

www.ti.com

2.4

Headphone Connector (J700)

1

4

2

3

PCB Connector

(Top View)

2.5

Control Interface (J40)

Headphone Connector (J700)

Figure 2-5. J700 Pin Numbers

Table 2-6. J700 Pin Description

PIN

NET NAME

DESCRIPTION

NO.

AT SCHEMATICS

1

OUT-R

Right headphone output

2

GND

Ground

3

Reserved

4

OUT-L

Left headphone output

This interface connects the TAS5518-5152K8EVM board to a TI input-USB board.

Table 2-7. J40 Pin Description

NET NAME

PIN NO.

DESCRIPTION

AT SCHEMATICS

1, 3, 11, 17,

GND

Ground

25, 26, 31, 32

2, 8, 9,

13–16, 18,

Reserved

19, 27–30

4

RESET

Backend error (or soft reset). Provides reduced click and pop reset, without resetting I

2

C

5

BKND-ERR

volume register settings.

6

MUTE

Ramp volume from any setting to noiseless soft mute. Mute also can be activated by I

2

C.

7

PDN

Power down. The TAS5518 goes to power-down state when activated.

10

SDA

I

2

C data clock

12

SCL

I

2

C bit clock

Shutdown reporting. Activated if one or more TAS5152 has high current or high temperature

20

SD

(see

Chapter 3

).

Shutdown reporting. Activated if one or more TAS5152 has high current or high temperature

21

SD

Pin 21 connected to pin 20 (see

Chapter 3

).

Overtemperature warning. Activated if one or more TAS5152 has reached temperature

22

OTW

warning level.

Overtemperature warning. Activated if one or more TAS5152 has reached temperature

23

OTW

warning level. Pin 23 connected to pin 22.

Headphone select. Headphone active when LOW and inactive when HIGH. To use this pin, a

24

HP-SEL

100-

resistor must be placed for R50.

33, 34

5 V

5-V dc power supply (output)

SLEU074 – June 2006

System Interfaces

15

Submit Documentation Feedback

Summary of Contents for TAS5152K8EVM

Page 1: ...TAS5518 5152K8EVM Evaluation Module for TAS5518 Digital Audio PWM Processor and TAS5152 Digital Amplifier Power Output Stage User s Guide June 2006 Digital Audio Video Products SLEU074...

Page 2: ...2 SLEU074 June 2006 Submit Documentation Feedback...

Page 3: ...2 2 2 PSU Control Interface J902 13 2 3 Loudspeaker Connectors J101 J107 14 2 4 Headphone Connector J700 15 2 5 Control Interface J40 15 2 6 Digital Audio Interface J60 16 3 Protection 17 3 1 Short Ci...

Page 4: ...7 Pin Numbers 14 2 5 J700 Pin Numbers 15 List of Tables 1 Related Documentation From TI 6 2 1 Recommended Supply Voltages 12 2 2 J901 Pin Description 12 2 3 J900 Pin Description 13 2 4 J902 Pin Descri...

Page 5: ...ns and Warnings This manual may contain cautions and warnings CAUTION This is an example of a caution statement A caution statement describes a situation that could potentially damage your software or...

Page 6: ...Related Documentation From TI PART NUMBER LITERATURE NUMBER TAS5518 SLES115 TAS5152 SLES127 TPA112 SLOS212 TPS3801K33 SLVS219 LM317M SLVS297 TPS76733 SLVS208 Additional Documentation q TAS5518 5152K8...

Page 7: ...gate drivers four matched and electrically isolated enhancement mode N channel power DMOS transistors and protection fault reporting circuitry The DKD PowerPAD package top side allows heat transfer t...

Page 8: ...y 2 Channel Headphone Output TAS5518 5152K8EVM Features Stereo channel line output Stereo headphone output Self contained protection system short circuit and thermal Standard inter IC sound I2 S and i...

Page 9: ...OUTPUT J700 J101 J103 J102 J104 PSU INTERFACE J900 J105 J106 J107 J108 OUTPUT STAGE CHANNEL 1 OUTPUT STAGE CHANNEL 4 OUTPUT STAGE CHANNEL 2 OUTPUT STAGE CHANNEL 6 OUTPUT STAGE CHANNEL 7 OUTPUT STAGE...

Page 10: ...www ti com PCB Key Map Overview 10 SLEU074 June 2006 Submit Documentation Feedback...

Page 11: ...ies and system interfaces Topic Page 2 1 Power Supply PSU Interface J901 and J900 12 2 2 PSU Control Interface J902 13 2 3 Loudspeaker Connectors J101 J107 14 2 4 Headphone Connector J700 15 2 5 Contr...

Page 12: ...in the TAS5152 data sheet Table 2 1 Recommended Supply Voltages VOLTAGE LIMITATIONS CURRENT DESCRIPTION 4 LOAD RECOMMENDATIONS System power supply 15 V to 20 V 0 3 A Output stage power supply 0 V to...

Page 13: ...ptional Use to decrease impedance to reach better performance This interface is used for onboard sensing of output supply voltage and for the power supply volume control PSVC signal Figure 2 3 J902 Pi...

Page 14: ...ive speaker outputs are floating and may not be connected to ground e g through an oscilloscope Figure 2 4 J101 J107 Pin Numbers Table 2 5 J101 J107 Pin Description PIN NET NAME DESCRIPTION NO AT SCHE...

Page 15: ...ing to noiseless soft mute Mute also can be activated by I2C 7 PDN Power down The TAS5518 goes to power down state when activated 10 SDA I2C data clock 12 SCL I2C bit clock Shutdown reporting Activate...

Page 16: ...PTION NO SCHEMATICS 1 3 10 GND Ground 12 14 16 Master clock input Low jitter system clock for PWM generation and reclocking Ground connection 2 MCLK from source to the TAS5518 must be a low impedance...

Page 17: ...n describes the short circuit protection and fault reporting circuitry of the TAS5152 device Topic Page 3 1 Short Circuit Protection and Fault Reporting Circuitry 18 3 2 Fault Reporting 18 SLEU074 Jun...

Page 18: ...to the TAS5152 Data Manual for a description of these pins Table 3 1 TAS5152 Warning Error Signal Decoding OTW SD DEVICE CONDITION 0 0 High temperature error and or high current error 0 1 High temper...

Page 19: ...he product This notice contains important safety information about temperatures and voltages For additional information on TI s environmental and or safety programs please contact the TI application e...

Page 20: ...iness practice TI is not responsible or liable for any such statements TI products are not authorized for use in safety critical applications such as life support where a failure of the TI product wou...

Reviews: