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Texas Instruments SWIFT TPS54350EVM-235 User Manual Download Page 7

 Contents

v

 

 

2−1

Connection Diagram

2-2

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2−2

Measured Efficiency, TPS54350

2-3

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2−3

Measured Circuit Losses

2-4

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2−4

Load Regulation

2-5

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2−5

Line Regulation

2-5

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2−6

Load Transient Response, TPS54350

2-6

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2−7

Measured Loop Response, TPS54350, V

I

 = 6 V

2-7

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2−8

Measured Loop Response, TPS54350, V

I

 = 18 V

2-7

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2−9

Measured Output Voltage Ripple, TPS54350

2-8

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2−10

Input Voltage Ripple, TPS54350

2-8

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2−11

Gate Drive Signal, TPS54350

2-9

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2−12

Powering Up

2-10

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2−13

Powering Down

2-10

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3−1

Top-Side Layout

3-2

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3−2

Bottom Side Layout

3-3

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3−3

Top Side Assembly

3-3

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3−4

Bottom Side Assembly

3-4

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4−1

TPS54350EVM-235 Schematic

4-2

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1−1

Input Voltage and Output Current Summary

1-2

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1−2

TPS54350EVM-235 Performance Specification Summary

1-3

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1−3

Output Voltage Programming

1-4

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1−4

Internal UVLO Setting

1-5

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4−1

TPS54350EVM-235 Bill of Materials

4-3

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Summary of Contents for SWIFT TPS54350EVM-235

Page 1: ... E September 2003 PMP Systems Power User s Guide SLVU097A ...

Page 2: ...titute a license from TI to use such products or services or a warranty or endorsement thereof Use of such information may require a license from a third party under the patents or other intellectual property of the third party or a license from TI under the patents or other intellectual property of TI Reproduction of information in TI data books or data sheets is permissible only if reproduction ...

Page 3: ... handling or use of the goods Please be aware that the products received may not be regulatory compliant or agency certified FCC UL CE etc Due to the open construction of the product it is the user s responsibility to take any and all appropriate precautions with regard to electrostatic discharge EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR A...

Page 4: ...here is uncertainty as to the load specification please contact a TI field representative During normal operation some circuit components may have case temperatures greater than 55 C The EVM is designed to operate properly with certain components above 60 C as long as the input and output ranges are maintained These components include but are not limited to linear regulators switching transistors ...

Page 5: ...yout Chapter 4 Schematic and Bill of Materials FCC Warning This equipment is intended for use in a laboratory test environment only It gen erates uses and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to subpart J of part 15 of FCC rules which are designed to provide reasonable protection against radio frequency interference...

Page 6: ...Synchronous Low Side FET 1 6 1 3 8 Optional Output Filtering 1 6 2 Test Setup and Results 2 1 2 1 Input Output Connections 2 2 2 2 Efficiency 2 3 2 3 Power Dissipation 2 4 2 4 Output Voltage Regulation 2 5 2 5 Load Transients 2 6 2 6 Loop Characteristic 2 7 2 7 Output Voltage Ripple 2 8 2 8 Input Voltage Ripple 2 8 2 9 Gate Drive 2 9 2 10 Powering Up and Down 2 10 3 Board Layout 3 1 3 1 Layout 3 2...

Page 7: ...tput Voltage Ripple TPS54350 2 8 2 10 Input Voltage Ripple TPS54350 2 8 2 11 Gate Drive Signal TPS54350 2 9 2 12 Powering Up 2 10 2 13 Powering Down 2 10 3 1 Top Side Layout 3 2 3 2 Bottom Side Layout 3 3 3 3 Top Side Assembly 3 3 3 4 Bottom Side Assembly 3 4 4 1 TPS54350EVM 235 Schematic 4 2 1 1 Input Voltage and Output Current Summary 1 2 1 2 TPS54350EVM 235 Performance Specification Summary 1 3...

Page 8: ... documentation for the TPS54350EVM 235 evaluation module SLVP235 The TPS54350EVM 235 performance specifications are given along with a schematic and bill of material for the TPS54350EVM 235 Topic Page 1 1 Background 1 2 1 2 Performance Specification Summary 1 3 1 3 Modifications 1 4 Chapter 1 ...

Page 9: ...de MOSFET is incorporated inside the TPS54350 package along with gate drive circuitry for an external synchronous FET The low drain to source on resistance of the MOSFET allows the TPS54350 to achieve high efficiencies and helps to keep the junction temperature low at high output currents The compensation components are provided external to the IC and allow for an adjustable output voltage and a c...

Page 10: ...ormance Specification Summary Specification Test Conditions Min Typ Max Units Input voltage range 6 0 12 0 18 V Output voltage set point 3 3 V Output current range VI 3 V to 5 5 V 0 3 A Line regulation IO 0 3 A VI 6 V to 18 V 0 1 Load regulation VI 12 V IO 0 A to 3 A 0 05 Voltage change IO 0 75 A to 2 25 A 10 mVPK Load transient Recovery time IO 0 75 A to 2 25 A 60 µs Load transient response Volta...

Page 11: ... minimum output voltage is limited by the minimum controllable on time of the device 125 ns and is dependent upon the duty cycle and operating frequency The approximate minimum output voltage can be calculated using Equation 1 2 Equation 1 2 VO min 125 nsec ƒs VI max 1 3 2 Switching Frequency The switching frequency may be trimmed to any value between 250 kHz and 700 kHz by changing the value of R...

Page 12: ... If the RT pin is programmed with a resistor to AGND the SYNC pin functions as an input When operating as an input the SYNC pin is a falling edge triggered signal and the resistor at the RT pin should be set to provide a frequency equal to 90 percent of the SYNC input frequency 1 3 6 Power Good An internal circuit monitors the VSENSE input voltage to verify that it is within a guard band around th...

Page 13: ...buck regulator If desired an external catch diode may be used in place of the FET The pad for the diode is located on the back side of the PCB Verify that the inductor is properly sized for operation without the low side FET The minimum value for the inductor when operating in this mode is given by the following equation Equation 1 5 L min V Oǒ1 V O V I max Ǔ fs 0 6 1 3 8 Optional Output Filtering...

Page 14: ...vers efficiency output voltage regulation load transients loop response output ripple input ripple and startup Topic Page 2 1 Input Output Connections 2 2 2 2 Efficiency 2 3 2 3 Power Dissipation 2 4 2 4 Output Voltage Regulation 2 5 2 5 Load Transients 2 6 2 6 Loop Characteristics 2 7 2 7 Output Voltage Ripple 2 8 2 8 Input Voltage Ripple 2 8 2 9 Gate Drive 2 9 2 10 Powering Up and Down 2 10 Chap...

Page 15: ...e to easily connect an oscilloscope voltage probe to monitor the output voltage The TPS54350 is intended to be used as a point of load regulator In typical applications it is usually located close to the input voltage source When using the TPS54350EVM 235 with an external power supply as the source for VI an additional bulk capacitor may be required depending upon the output impedance of the sourc...

Page 16: ...t reflect the high efficiencies that are possible for specific applications using the TPS54350 Figure 2 2 shows the efficiency for the TPS54350 at an ambient temperature of 25_C The efficiency is lower at higher ambient temperatures due to temperature variation in the drain to source resistance of the MOSFETs The efficiency is slightly lower at 500 kHz than at lower switching frequencies due to th...

Page 17: ...aching the current limit of 4 2 A the junction temperature is approximately 47 C The total circuit losses at 25 C are shown in Figure 2 3 Power dissipation is shown for input voltages of 6 V 12 V and 18 V For additional information on the dissipation ratings of the devices see the individual product data sheets Figure 2 3 Measured Circuit Losses 0 0 5 1 1 5 2 2 5 3 0 0 5 1 1 5 2 2 5 3 3 5 Power Di...

Page 18: ...rements are given for an ambient temperature of 25 C Figure 2 4 Load Regulation 0 3 0 2 0 1 0 0 1 0 2 0 3 0 0 5 1 1 5 2 2 5 3 3 5 OUTPUT VOLTAGE vs OUTPUT CURRENT IO Output Current A Output Voltage Change V O VI 18 V VI 12 V VI 6 V Figure 2 5 Line Regulation 0 1 0 08 0 06 0 04 0 02 0 0 02 0 04 0 06 0 08 0 1 4 6 8 10 12 14 16 18 20 22 IO 3 A IO 0 A OUTPUT VOLTAGE vs INPUT VOLTAGE VI Input Voltage V...

Page 19: ...load transients is shown in Figure 2 6 The current step is from 25 to 75 of maximum rated load Total peak to peak voltage variation is as shown including ripple and noise on the output Figure 2 6 Load Transient Response TPS54350 VO AC 10 mV div IO 1 A div t Time 200 µs div ...

Page 20: ...ge Figure 2 7 Measured Loop Response TPS54350 VI 6 V 60 50 40 30 20 10 0 10 20 30 40 50 60 100 1 k 10 k 100 k 1 M 180 150 120 90 60 30 0 30 60 90 120 150 180 Phase Gain Gain dB f Frequency Hz MEASURED LOOP RESPONSE Phase deg Figure 2 8 Measured Loop Response TPS54350 VI 18 V 60 50 40 30 20 10 0 10 20 30 40 50 60 100 1 k 10 k 100 k 1 M 180 150 120 90 60 30 0 30 60 90 120 150 180 Phase Gain Gain dB ...

Page 21: ...asured directly across output capacitors Figure 2 9 Measured Output Voltage Ripple TPS54350 VO AC 20 mV div Vphase 5 V div t Time 1 µs div 2 8 Input Voltage Ripple The TPS54350EVM 235 output voltage ripple is shown in Figure 2 10 The input voltage is 3 3 V for the TPS54350 Output current for each device is rated full load of 3 A Figure 2 10 Input Voltage Ripple TPS54350 VO AC 200 mV div Vphase 5 V...

Page 22: ...ve The TPS54350 provides the the gate drive signal for a synchronous low side FET This gate drive signal and its relation ship to the PHASE signal is shown in Figure 2 11 Figure 2 11 Gate Drive Signal TPS54350 LSG 5 V div Vphase 5 V div t Time 1 µs div ...

Page 23: ...tput ramping up in Ch 2 and the PWRGD signal in Ch 3 Note that the PWRGD signal is pulled up externally to 3 3 V Figure 2 12 Powering Up VI 5 V div Vpwrgd 2 V div t Time 2 ms div VO 2 V div The corresponding power down waveform is shown in Figure 2 13 The channel assignments are the same as in the power up waveform above Figure 2 13 Powering Down VI 5 V div Vpwrgd 2 V div t Time 2 ms div VO 2 V di...

Page 24: ...3 1 Board Layout This chapter provides a description of the TPS54350EVM 235 board layout and layer illustrations Topic Page 3 1 Layout 3 2 Chapter 3 ...

Page 25: ...ane along with a Vphase area and the Vsense trace The bottom layer also has pads for placing snubber components R10 and C11 and an optional catch diode D1 The top and bottom ground traces are connected with multiple vias placed around the board including 8 directly under the TPS54350 device to provide a thermal path from the PowerPAD land to ground The input decoupling capacitor C9 bias decoupling...

Page 26: ...Layout 3 3 Board Layout Figure 3 2 Bottom Side Layout Figure 3 3 Top Side Assembly ...

Page 27: ...Layout 3 4 Figure 3 4 Bottom Side Assembly ...

Page 28: ...4 1 Schematic and Bill of Materials The TPS54350EVM 235 schematic and bill of materials are presented in this chapter Topic Page 4 1 Schematic 4 2 4 2 Bill of Materials 4 3 Chapter 4 ...

Page 29: ...7 Ω BACK SIDE D1 MBR5340T3 OPEN FDR6674A Q1 1 2 3 6 7 S 5 8 L1 10 µ H 2 1 TP8 C4 1 µ F 4 C3 0 1 µ F 16 15 14 13 12 11 10 9 BOOT PH PH LSG VBIAS PGND AGND VSENSE PwrPd 17 U1 TPS54350PWP VIN VIN UVLO PWRGD RT SYNC ENA COMP R1 1 kΩ C8 33 nF R5 137 Ω R2 374 Ω R3 768 Ω C6 82 nF C7 1800 pF 8 7 6 5 4 3 2 1 R11 OPEN TP2 Power Good Pull up 3 3 or 5 V TP1 R8 10 kΩ R4 OPEN R7 OPEN R6 OPEN C9 10 µF C1 OPEN TP...

Page 30: ...Inductor SMT 10 µH 8 A 20 mΩ 0 51 x 0 51 Vishay IHLP 5050CZ 1 Q1 Transistor MOSFET Nch 11 5 A 30 V 9 5 mΩ 0 160 x 0 130 Fairchild FDR6674A 1 R1 Resistor chip 1 00 kΩ 1 16 W 1 603 std std 1 R10 Resistor chip 4 7 Ω 1 2 W 5 2010 std std 1 R2 Resistor chip 374 Ω 1 16 W 1 603 std std 1 R3 Resistor chip 768 Ω 1 16 W 1 603 std std R4 R6 R7 R11 Resistor chip xx Ω 1 16 W 1 603 std std 1 R5 Resistor chip 13...

Page 31: ...4 4 ...

Page 32: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information Texas Instruments TPS54350EVM 235 ...

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