Hardware Description
12
July 5, 2011
Reset
A reset switch and R-C network connects to the microcontroller’s RSTn input. The reset signal is
also connected to the JTAG/SWD connector J1 to allow reset control from the debugger.
GPIO Pads
Four groups of oversized board pads with a 0.1” spacing provide access to GPIO signals and
standard 0.1” pitch headers can be soldered to these pads. Pads are labeled with the
corresponding GPIO signal, and pads with no labels are unconnected. Note that GPIO signals
required for operation of the Ethernet port, USB port, and JTAG port are reserved for board use
and are not available on these pads. Figure 2-2 shows the pad groups.
Figure 2-2.
GPIO Pads
GPIO Jumpers
Some of the GPIO signals used by the board are connected to board jumpers and can be
disconnected to provide additional user GPIOs. GPIOs PA0/PA1/PB4/PD0/PF2/PF3 are
connected to jumpers JR1-JR6 respectively. Each signal can be freed by cutting the trace of the
corresponding jumper (cut at white line on silkscreen). The jumper pads have the same footprint
as an 0603 SMT resistor. To reconnect a previously cut jumper, solder a 0 ohm resistor to the
corresponding jumper footprint.
JTAG/SWD
The JTAG/SWD connector J1 is used for program download and debug. This is a 2x5 fine pitch
(0.050”) ARM JTAG connector, see (Figure 2-3) for signal definition. The LM3S9D90
microcontroller supports JTAG debug, Serial Wire Debug (SWD), and Serial Wire Out (SWO) trace
with this connector. The ICDI board connects via a 10-wire ribbon cable to this connector.
Figure 2-3.
JTAG/SWD Connector
GPIO Pads – Top left
SHDN
VB
AT
WAKE
PD
1
PD
0
PD
2
PD
3
PD
4
PD
5
PD
6
PD
7
PC
5
PC
4
PC
7
PC6
HIB
GPIO Pads – Bottom left
PA
4
PA
7
PA
6
5V
R
5V
PB2 PB3 PB4 PB5 PB6 PB7
PA1
PA0
PA
3
PA2
PA
5
GN
D
GN
D
GPIO Pads – Top right
VBUS
PG
7
PH0 PH
1
PH
2
PH
5
PH
6
PH
7
PJ
1
PJ
0
PJ
2
PG0
PG
1
GPIO Pads – Bottom right
PE
4
PE
7
PE
6
PF1
PF0
PF
2
PF3 PF4 PF
5
PE
1
PE
0
PE
3
PE
2
PE5
3.3
V
GN
D
TMS/SWDIO
TCK/SWCLK
TDO/SWO
TDI
RSTn
GND
GND
GND
3.3V
N/C
1
2
9
10
In
In
Out
I/O
In
Out
Summary of Contents for Stellaris LM3S9D90
Page 5: ...July 5 2011 5 List of Tables Table C 1 EK LM3S9D90 Evaluation Board GPIO Usage 29 ...
Page 6: ...6 July 5 2011 ...
Page 10: ...Stellaris LM3S9D90 Evaluation Kit Overview 10 July 5 2011 ...
Page 24: ...24 July 5 2011 ...
Page 28: ...References 28 July 5 2011 ...
Page 30: ...30 July 5 2011 ...