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Texas Instruments Stellaris LM3S6965 User Manual Download Page 20

1

1

2

2

3

3

4

4

5

5

6

6

D

D

C

C

B

B

A

A

Document Number:

Rev

Sheet

Date:

of

3/26/2008

3

3

Drawing Title:

Page Title:

Size

Ethernet Evaluation Board

USB, Debugger Interfaces and Power

B

D

3

FB1

60ohm @ 100 MHz

GND

18

GND

25

GND

34

ADBUS0

24

ADBUS1

23

ADBUS2

22

ADBUS3

21

ADBUS4

20

ADBUS5

19

ADBUS6

17

ADBUS7

16

ACBUS0

15

ACBUS1

13

ACBUS2

12

ACBUS3

11

BDBUS0

40

BDBUS1

39

BDBUS2

38

BDBUS3

37

BDBUS4

36

BDBUS5

35

BDBUS6

33

BDBUS7

32

BCBUS0

30

BCBUS1

29

BCBUS2

28

BCBUS3

27

SI/WUA

10

SI/WUB

26

GND

9

AGND

45

VCC

3

VCC

42

VCCIOA

14

VCCIOB

31

AVCC

46

PWREN#

41

XTOUT

44

XTIN

43

EECS

48

EESK

1

EEDATA

2

TEST

47

RESET#

4

RSTOUT#

5

3V3OUT

6

USBDM

8

USBDP

7

U4

FT2232D

+3.3v

USB+5V

R21 27

R22 27

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

P2

Header 10X2

+3.3V

+3.3V

DBG_JTAG_EN

R24
10K

R25

1.5K

R23
1.5K

R30

330

+5V

+5V

+5V

+5V

XTDI
XTMS

TCK
TDI/DI
TDO/DO
TMS/OUTEN

+3.3V

+5V

0.1UF

C37

0.1UF

C33

0.1UF

C34

0.1UF

C35

0.1UF

C36

0.1UF

C31

USB Device Controller

Channel A : JTAG / SW Debug

Channel B : Virtual Com Port

USB +5V to +3.3V 500mA Power Supply

R31

27

R29

27

R26

27

XTCK

R28

27

VCP_RX

VCP_TX

TCK/SWCLK

PC2/TDI

PC3/TDO

TMS/SWDIO

C32

0.01UF

5V

D-

D+

ID

G

1

2

3

4

7

5

6

P1

54819-0519

+3.3V

SRSTN

TARGETCABLEn

XTDO

R27

27

TP4

TP3

TP2

TP1

TP5

TP6

+3.3V

PLD JTAG TEST POINTS

PLD_TCK

PLD_TMS

PLD_TDI

PLD_TDO

VOUT

4

SENSE

5

VIN2

6

GND

2

NC

3

GND

7

VIN1

1

U6

LP8345ILD-3.3

USB+5V

R32

4.7K

+3.3v

Debug Interface Logic

JP18

PC3/TDO

TCK/SWCLK

TMS/SWDIO

PC2/TDI

C38
4.7UF

C39
4.7UF

JTAG/SWD Interface
Input/Output

USB Interface

TD

I

1

A5

2

A6

3

A7

4

GN

D

 (B

a

nk 0)

5

VCCO (Ba

nk

 0)

6

A8

7

A9

8

A10

9

A11

10

TC

K

11

VC

C

12

GN

D

13

A12

14

A13

15

A14

16

A15

17

CLK1/I

18

CLK2/I

19

B0

20

B1

21

B2

22

B3

23

B4

24

TM

S

25

B5

26

B6

27

B7

28

GN

D

 (B

a

nk 1)

29

VCCO (Ba

nk

 1)

30

B8

31

B9

32

B10

33

B11

34

TD

O

35

VC

C

36

GN

D

37

B12

38

B13

39

B14

40

B15/G

O

E

1

41

CLK3/I

42

CLK0/I

43

A0/GOE0

44

A1

45

A2

46

A3

47

A4

48

Bank 0

Bank 1

U3
LC4032V-75TN48C

+3.3V

PC2/TDI

MCURSTn

DBGOUTLED

TARGETCABLEn

PC3/TDO

RESET_SWn

0.1UF

C29

+3.3V

TMS/SWDIO
TCK/SWCLK

Omit

JP17

USBSH

CS

1

SK

2

DI

3

DO

4

GND

5

ORG

6

NC

7

VCC

8

1K 64X16

U5

CAT93C46

1

2

Y2

6.00MHz

18PF

C10

18PF

C11

PB7/TRST

0.1UF

C42

R34
4.7K

+3.3V

INT_TCK

SWO_EN

VCP_TX_SWO

MODE

MODE is reserved 

for future use.

R8
4.7K

+3.3V

XVCC

Schematic page 3

Summary of Contents for Stellaris LM3S6965

Page 1: ...EK LM3S6965 06 Copyright 2007 2010 Texas Instruments User s Manual Stellaris LM3S6965 Evaluation Board ...

Page 2: ...is and StellarisWare are registered trademarks of Texas Instruments ARM and Thumb are registered trademarks and Cortex is a trademark of ARM Limited Other names and brands may be claimed as the property of others Texas Instruments 108 Wild Basin Suite 350 Austin TX 78746 http www ti com stellaris ...

Page 3: ...USB Device Controller Functions 13 Device Overview 13 USB to JTAG SWD 13 Virtual COM Port 13 Serial Wire Out 13 Organic LED Display 13 Features 13 Control Interface 14 Power Supply 14 Design Guidelines 14 Further Reference 14 Other Peripherals 14 Speaker 14 MicroSD Card Slot 14 Push Switches 14 User LED 15 Bypassing Peripherals 15 Interfacing to the EVB 15 Using the In Circuit Debugger Interface 1...

Page 4: ... Figures Figure 1 1 Stellaris LM3S6965 Evaluation Board Layout 7 Figure 1 2 LM3S6965 Evaluation Board Block Diagram 8 Figure 2 1 ICD Interface Mode 16 Figure B 1 Component Locations 23 Figure B 2 Evaluation Board Dimensions 24 ...

Page 5: ... 5 List of Tables Table 2 1 Stellaris LM3S6965 Evaluation Board Hardware Debugging Configurations 12 Table 2 2 Isolating On Board Hardware 15 Table B 1 I O Breakout Pads 25 Table B 2 Recommended Connectors 25 Table B 3 20 Pin JTAG SWD Configuration 26 ...

Page 6: ...6 January 6 2010 ...

Page 7: ...ramming or debugging of an external target The kit is also compatible with high performance external JTAG debuggers This evaluation kit enables quick evaluation prototype development and creation of application specific designs for Ethernet networks The kit also includes extensive source code examples allowing you to start building C code applications quickly Figure 1 1 Stellaris LM3S6965 Evaluati...

Page 8: ...shbuttons Magnetic speaker LM3S6965 I O available on labeled break out pads Standard ARM 20 pin JTAG debug connector with input and output modes USB interface for debugging and power supply MicroSD card slot Block Diagram Figure 1 2 LM3S6965 Evaluation Board Block Diagram USB USB Stellaris LM3S6965 Microcontroller Dual USB Device Controller I O Signals OLED Display 128 x 96 Debug Nav Switch Switch...

Page 9: ... code Stellaris Firmware Development Package with example source code Evaluation Board Specifications Board supply voltage 4 37 5 25 Vdc from USB connector Board supply current 250 mA typ fully active CPU at 50 MHz Break out power output 3 3 Vdc 60 mA max 15 Vdc 15 mA max Dimensions 4 0 x 2 45 x 0 7 LxWxH RoHS status Compliant Features of the LM3S6965 Microcontroller 32 bit RISC performance using ...

Page 10: ...ors Two I2 C modules Three PWM generator blocks One 16 bit counter Two comparators Produces two independent PWM signals One dead band generator Two QEI modules with position integrator for tracking encoder position 0 to 42 GPIOs depending on user configuration On chip low drop out LDO voltage regulator ...

Page 11: ...e The RJ45 jack incorporates LEDs that indicate traffic and link status These are automatically managed by on chip microcontroller hardware Alternatively the LEDs can be software controlled by configuring those pins as general purpose outputs The LM3S6965 supports automatic MDI MDI X so the EVB can connect directly to a network or to another Ethernet device without requiring a cross over cable Clo...

Page 12: ...vision D or later automatically configure pin 1 to be a 3 3 V reference if an external debugger is connected To determine the revision of your board locate the product number on the bottom of the board for example EK LM3S6965 D The last character of the product number identifies the board revision A configuration or board level change may be necessary when using an external debug interface with re...

Page 13: ...SB device performs JTAG SWD serial operations under the control of the debugger A CPLD U2 multiplexes SWD and JTAG functions and when working in SWD mode provides direction control for the bidirectional data line Virtual COM Port The Virtual COM Port VCP allows Windows applications such as HyperTerminal to communicate with UART0 on the LM3S6965 over USB Once the FT2232 VCP driver is installed Wind...

Page 14: ... OLED display When using the EVB as an in circuit debug interface ICDI the OLED display is held in reset to reduce power consumption and eliminate display wear out Further Reference For additional information on the RiT OLED display visit www ritekdisplay com Other Peripherals Speaker A small magnetic audio transducer connects through a MOSFET to PD1 PWM1 allowing a range of options for generating...

Page 15: ...rfacing to the EVB An array of accessible I O signals makes it easy to interface the EVB to external circuits All LM3S6965 I O lines except those with both JTAG and SWD functions are brought out to 0 1 pitch pads For quick reference silk screened labels on the PCB show primary pin functions Table B 1 on page 25 has a complete list of I O signals as well as recommended connectors Table 2 2 Isolatin...

Page 16: ...n of how to enter Debug Out mode Figure 2 1 ICD Interface Mode The debug interface operates in either Serial Wire Debug SWD or full JTAG mode depending on the configuration in the debugger IDE The IDE debugger does not distinguish between the on EVB Stellaris microcontroller and an external Stellaris microcontroller The only requirement is that the correct Stellaris device is selected in the proje...

Page 17: ... schematics for the LM3S6965 evaluation board LM3S6965 Micro and 10 100 Ethernet on page 18 OLED Display Switches and Audio on page 19 USB Debugger Interfaces and Power on page 20 JTAG Logic with Auto Mode Detect and Hibernate on page 21 A P P E N D I X A ...

Page 18: ...SSI0TX PA7 I2CSDA PB4 C0 PD5 CCP2 PD7 CCP1 ADC0 ADC2 PD1 PWM1 PD3 U1TX PG0 U2RX PC6 CCP3 PC4 PhA0 PA0 U0Rx PA2 SSI0CLK PA4 SSI0RX PA6 I2CSCL 3 3V 5V 15V PB5 C1 PB6 C0 PB7 TRST PC2 TDI PC3 TDO PE3 PhA1 PE2 PhB1 PE0 PWM4 PE1 PWM5 PB2 I2C0SCL PB3 I2CSDA PB1 PWM3 PF1 IDX1 PB0 PWM2 PF3 LED0 PF2 LED1 OSC32OUT OSC32IN 3 3V PF0 PWM0 I O Break out Headers R33 10K 3 3V 1 2 Y3 8 00MHz 18PF C40 18PF C41 A 5 1...

Page 19: ... microSD Card Slot 1 2 3 4 5 6 7 8 9 10 11 12 P3 2908 05WB MG 3 3V C28 0 1UF 3 3V CARDCSn SSITX SSICLK SSIRX R17 10K R19 10K 3 3V 3 3V 1 2 BZ1 NFT 03A LED2 Green LED3 Red LED4 Green C30 OMIT R14 200K SSITX SSICLK 3 3V 128x96 OLED Graphics Display C26 4 7UF MCURSTn OLEDDC 15V OLEDCSn C23 0 1UF C21 0 1UF RGS13128096WH000 NC 1 VCIR 2 VCOMH 3 LVSS 4 VSS 5 BS1 6 BS2 7 IREF 8 CSn 9 RESn 10 D Cn 11 R Wn ...

Page 20: ...Power Supply R31 27 R29 27 R26 27 XTCK R28 27 VCP_RX VCP_TX TCK SWCLK PC2 TDI PC3 TDO TMS SWDIO C32 0 01UF 5V D D ID G 1 2 3 4 7 5 6 P1 54819 0519 3 3V SRSTN TARGETCABLEn XTDO R27 27 TP4 TP3 TP2 TP1 TP5 TP6 3 3V PLD JTAG TEST POINTS PLD_TCK PLD_TMS PLD_TDI PLD_TDO VOUT 4 SENSE 5 VIN2 6 GND 2 NC 3 GND 7 VIN1 1 U6 LP8345ILD 3 3 USB 5V R32 4 7K 3 3v Debug Interface Logic JP18 PC3 TDO TCK SWCLK TMS SW...

Page 21: ...4 I91 10 I7 45 I37 3 I5 4 I4 48 I87 41 I8 40 I115 I9 I99 I111 I112 I95 I109 I20 FTDI_DBG DBGOUT VCP_TX ITCK SWO_EN FTDI_TCK XTCK FTDI_TDI_DO U0TX XTDO FTDI_TDO_DI JTAGEN FTDI_TMS XTDI JTAGEN FTDI_DBG FTDIJTAGEN SWDEN FTDI_SRSTn XTMS FTDI_DBG DBGOUT DBGLED INTDBG TEST TRSTn RSTSW MCURSTn RC EXTCABLEn TVCC HIBn DRVEN Sept 28 2007 JTAG Logic with Auto Mode Detect Hibernate and TVcc Control LM3S6965 E...

Page 22: ...22 January 6 2010 ...

Page 23: ... Connection Details This appendix contains the following sections Component Locations Evaluation Board Dimensions I O Breakout Pads ARM Target Pinout Component Locations Figure B 1 Component Locations A P P E N D I X B ...

Page 24: ...ensions Figure B 2 Evaluation Board Dimensions I O Breakout Pads The LM3S6965 EVB has 44 I O pads 14 power pads and 2 crystal connections for a total of 60 pads Connection can be made by soldering wires directly to these pads or by using 0 1 pitch headers and sockets ...

Page 25: ...7 ADC0 PC3 TDO 41 42 PE3 PHA1 ADC3 26 25 ADC2 PE2 PHB1 43 44 GND IDX0 24 23 GND PE0 PWM4 45 46 PE1 PWM5 PD2 U1RX 22 21 PD1 PWM1 PB2 SCL0 47 48 PB3 SDA0 PG1 U2TX 20 19 PD3 U1TTX PB1 PWM3 49 50 GND PC7 PHB0 18 17 PG0 U2RX PF1 IDX1 51 52 PB0 PWM2 PC5 C1 16 15 PC6 CCP3 PF3 LED0 53 54 PF2 LED1 GND 14 13 PC4 PHA0 GND 55 56 OSC32 3 3 V 12 11 PA0 U0RX GND 57 58 OSC32 PA1 U0TX 10 9 PA2 SSICLK PF0 PWM0 59 6...

Page 26: ...ls are not necessary It is recommended that connections be made to all GND pins however both targets and external debug interfaces must connect pin 18 and at least one other GND pin to GND References In addition to this document the following references are included on the Stellaris LM3S6965 Evaluation Kit documentation CD ROM and are also available for download at www ti com stellaris Stellaris L...

Page 27: ...n on development tool being used RealView MDK web site www keil com arm rvmdkkit asp IAR Embedded Workbench web site www iar com Code Sourcery GCC development tools web site www codesourcery com gnu_toolchains arm Code Red Technologies development tools web site www code red tech com Texas Instruments Code Composer Studio IDE web site www ti com ccs ...

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