Texas Instruments SN74AXC4T774, User Manual, Page: 2 / 7

Introduction
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2 SCEU015 – May 2019
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SN74AXC4T774 Evaluation Module User Guide
1 Introduction
The AXC devices are a new family of direction controlled level translators from Texas Instruments. AXC
devices have dual-supply pins enabling configurable voltage translation between 0.65 V and 3.6 V and
any intermediate voltage ranges. The SN74AXC4T774EVM can be used to evaluate
SN74AXC4T774
translator device in the PW or the RSV packages. Refer to the competitive advantages of the AXC Family
in the application report
Power sequencing for the AXC family of devices ( SCEA058 ). Watch Introduction
to the AXC family of direction controlled translation device .
1.1 Features
The AXC family of direction controlled translation devices are dual-supply with configurable voltage
translation and an operating range from 0.65 V to 3.6 V. The A port is designed to track V
CCA
. V
CCA
accepts
any supply voltage from 0.65 V to 3.6 V. The B port is designed to track V
CCB
. V
CCB
accepts any supply
voltage from 0.65 V to 3.60 V. The SN74AXC4T774 device is fully specified for partial-power-down
applications using I
OFF
. The I
OFF
circuitry disables the outputs, thus preventing damaging current backflow
through the device when the device is powered down. The V
CC
isolation feature ensures that if either V
CC
input is at ground, both A and B data I/O ports are in the high-impedance state.
The eight channel SN74AXC8T245 device has two direction control pins, each controlling 4 data I/Os
enabling independent and simultaneous up and down translation. Refer to SN74AXC8T245EVM for
testing SN74AXC8T245PW package.
The four channel SN74AXC4T774 device has individual direction control pins for each of it's IO(A and B)
ports to allow configurable up and down translation.
The functional table of the SN74AXC4T774 is listed in Table 1 .This EVM is pre-configured to support
translation for Serial Peripheral Interface (SPI) and Joint Test Action Group (JTAG) interface as shown in
Table 2 .Refer to the low voltage translation for standard interfaces in the application report Low voltage
translation for SPI, UART, RGMII, and JTAG interfaces ( SCEA065 ).
Table 1. SN74AXC4T774 Functional Table(Each 1-bit section)
OE DIRx Signal Direction
H X Hi-Z
L L B data to A bus
L H A data to B bus
Table 2. SPI, JTAG Interface EVM setup
PINS PULL-UP (PW
AND RSV) PULL-DOWN (PW
AND RSV) DEFAULT STATE STATUS
OE R1, R6 R13, R14 10k
Ω
to GND DEVICE
ENABLED
DIR1 R2, R7 NO 10k Ω to Vcca A1(Input) TO
B1(Output)
DIR2 R3, R8 NO 10k Ω to Vcca A2(Input) TO
B2(Output)
DIR3 R4, R9 NO 10k
Ω
to Vcca A3(Input) TO
B3(Output)
DIR4 R5, R10 R15, R16 10k Ω to GND B4(Input) TO
A4(Output)