8.15.1.1 Analog-to-Digital Converter (ADC) Characteristics (continued)
T
c
= 25 °C, V
DDS
= 3.0 V and voltage scaling enabled, unless otherwise noted.
Performance numbers require use of offset and gain adjustements in software by TI-provided ADC drivers.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Reference voltage
Equivalent fixed internal reference (input voltage
scaling enabled). For best accuracy, the ADC
conversion should be initiated through the TI-RTOS API
in order to include the gain/offset compensation factors
stored in FCFG1
4.3
V
Reference voltage
Fixed internal reference (input voltage scaling
disabled). For best accuracy, the ADC conversion
should be initiated through the TI-RTOS API in order to
include the gain/offset compensation factors stored in
FCFG1. This value is derived from the scaled value
(4.3 V) as follows:
V
ref
= 4.3 V × 1408 / 4095
1.48
V
Reference voltage
VDDS as reference, input voltage scaling enabled
VDDS
V
Reference voltage
VDDS as reference, input voltage scaling disabled
VDDS /
V
Input impedance
200 kSamples/s, voltage scaling enabled. Capacitive
input, Input impedance depends on sampling frequency
and sampling time
>1
MΩ
(1)
Using IEEE Std 1241-2010 for terminology and test methods
(2)
Input signal scaled down internally before conversion, as if voltage range was 0 to 4.3 V
(3)
Applied voltage must be within Absolute Maximum Ratings (see
) at all times
(4)
No missing codes
(5)
ADC_output = Σ(4
n
samples ) >> n, n = desired extra bits
SWRS232D – FEBRUARY 2019 – REVISED FEBRUARY 2021
26
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