ADC Control Registers
769
SPNU503C – March 2018
Copyright © 2018, Texas Instruments Incorporated
Analog To Digital Converter (ADC) Module
19.11.42 ADC Group2 Results Emulation FIFO Register (ADG2EMUBUFFER)
ADC Group2 Results Emulation FIFO Register (ADG2EMUBUFFER) is shown in
and
, described in
. As shown, the format of the data read from the
ADG2EMUBUFFER locations is different based on whether the ADC module is configured to be a 12-bit
or a 10-bit ADC module.
A read from this location also gives out one conversion result from the Group2 results’ memory along with
the G2_EMPTY status bit and the optional channel id. However, this read will not affect any of the status
flags in the Group2 interrupt flag register or the Group2 status register. This register is useful for
debuggers.
Figure 19-68. 12-bit ADC Group2 Results Emulation FIFO Register (ADG2EMUBUFFER)
[offset = F8h]
31
30
21
20
16
G2_EMPTY
Reserved
G2_CHID
R-1
R-0
R-0
15
12
11
0
Reserved
G2_DR
R-0
R-U
LEGEND: R/W = Read/Write; R = Read only; -
n
= value after reset; -U = value after reset is unknown
Figure 19-69. 10-bit ADC Group2 Results Emulation FIFO Register (ADG2EMUBUFFER)
[offset = F8h]
31
16
Reserved
R-0
15
14
10
9
0
G2_EMPTY
G2_CHID
G2_DR
R-1
R-0
R-U
LEGEND: R/W = Read/Write; R = Read only; -
n
= value after reset; -U = value after reset is unknown
Table 19-47. ADC Group2 Results Emulation FIFO Register (ADG2EMUBUFFER) Field Descriptions
Field
Value
Description
Reserved
0
Reads return zeros, writes have no effect.
G2_EMPTY
Group2 FIFO Empty. This bit is applicable only when the "read from FIFO" mode is used for reading the
Group2 conversion results.
Any operation mode read:
0
The data in the G2_DR field of this buffer is valid.
1
The data in the G2_DR field of this buffer is not valid and there are no valid data in the Group2 results
memory.
G2_CHID
Group2 Channel Id. These bits are also applicable only when the "read from FIFO" mode is used for
reading the Group2 conversion results.
Any operation mode read:
0
The conversion result in the G2_DR field of this buffer is from the ADC input channel 0, or the channel id
mode is disabled in the Group2 operating mode control register (ADG2MODECR).
1h-1Fh
The conversion result in the G2_DR field of this buffer is from the ADC input channel number denoted by
the G2_CHID field.
G2_DR
Group2 Digital Conversion Result.
These bits contain the digital result output from the Group 2 FIFO buffer. The result can be presented in an
8-bit, 10-bit, or 12-bit format for a 12-bit ADC module, or in an 8-bit or 10-bit format for a 10-bit ADC
module. The conversion result data is automatically shifted right by the appropriate number of bits when
using a reduced-size data format with the upper bits reading as zeros.
