Interrupt Priority
Low-Priority
Interrupt Handling
High-Priority
Interrupt Handling
Error Signal
Handling
error_group1
error_group2
error_group3
ERROR
Device
Low-Priority
Interrupt
High-Priority
Interrupt
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Interrupt Enable
ERROR Pin Enable
Output
PIN
Overview
409
SPNU503C – March 2018
Copyright © 2018, Texas Instruments Incorporated
Error Signaling Module (ESM)
12.1 Overview
The Error Signaling Module (ESM) collects and reports the various error conditions on the microcontroller.
The error condition is categorized based on a severity level. Error response is then generated based on
the category of the error. Possible error responses include a low-priority interrupt, high-priority interrupt,
and an external pin action.
12.1.1 Features
•
Up to 128 error channels are supported, divided into 3 different groups:
–
64 Group1 (low-severity) channels with configurable interrupt generation and configurable ERROR
pin behavior
–
32 Group2 (high-severity) channels with predefined interrupt generation and predefined ERROR pin
behavior
–
32 Group3 (high-severity) channels with no interrupt generation and predefined ERROR pin
behavior. These channels have no interrupt response as they are reserved for CPU based
diagnostics that generate aborts directly to the CPU.
•
Dedicated device ERROR pin to signal an external observer
•
Configurable timebase for ERROR pin output
•
Error forcing capability for latent fault testing
12.1.2 Block Diagram
As shown in
, the ESM channels are divided into three groups. Group1 channels are
considered to be low-severity. Group1 errors have a configurable interrupt response and configurable
ERROR pin behavior. Note that the ESM Status Register 1 (ESMSR1) for error group1 gets updated,
regardless of whether an ESM interrupt for that Group1 channel is enabled or not. Group2 channels are
connected to higher-severity error signals. Group2 errors generate a non-maskable high-priority interrupt
to the CPU and assert the ERROR pin. Group3 channels indicate errors of the highest severity. Check the
specific part's datasheet for identifying group3 errors and their expected responses. Group3 errors always
generate an ERROR pin output.
The ESM interrupt and ERROR pin behavior are also summarized in
Figure 12-1. Block Diagram
