Setup and Operation
3
SLDU019B – December 2015 – Revised March 2016
Copyright © 2015–2016, Texas Instruments Incorporated
PGA450Q1EVM-S User's Guide and TIDA-00151 UART Demo Instructional
2.1
Input and Output Connectors
The PGA450Q1EVM-S has two power connectors, three communication interfaces, and two outputs.
lists the connectors in addition to a function description which includes the electrical
specifications.
(1)
The TI GER (Texas Instruments general equipment resource) USB interface board is included with the purchase of the
PGA450Q1EVM, and cannot be purchased separately. Purchase the PGA450Q1EVM or develop a custom USB interface tool to
program or evaluate the PGA450-Q1 device on the PGA450Q1EVM-S platform.
Table 1. Terminal Descriptors
Terminal
Designator
Direction
Description
MAIN
J2-1
Input
Single-system power supply to the VPWR pin of the PGA450-Q1
device. This supply is rated at 7 to 18 V DC for powering the entire
board.
LIN
J2-2
Input/Output
The PGA450-Q1 device implements the LIN 2.1 compliant physical
layer. This physical layer can be used to communicate data between
the PGA450-Q1 device and the master MCU.
GND
J2-3, J4-2
—
Ground terminal to complete the circuit.
VPROG
J2-4
Input
VPROG_OTP power supply input of 8 V for programming OTP
memory of the PGA450-Q1 device.
SPI
J3
Input/Output
SPI is the communication that is required for use with the
PGA450Q1EVM GUI and TI GER USB interface for programming the
PGA450-Q1 device
(1)
. The internal 8051W must be placed in reset to
communicate using SPI.
UART
J4-3, J4-4
Input/Output
The TxD and RxD pins on the PGA450-Q1 device are connected to
the 8051W UART. These two pins can be used either for software
debugging or for implementing application-specific protocols.
DACO
J4-1
Output
Observe the echo signal as an amplified analog signal or from a DAC
output which converts a digitally filtered echo signal. In the Evaluation
tab of the GUI, the quick-access buttons,
Amplifier Output
(unfiltered)
and
Datapath Output
(filtered), are available. The signal is viewable
on the DACO pin. Only one mode can be selected at a time.
XDCR
Connector
J1
Input/Output
The transducer (XDCR) connector is used to drive and listen for
ultrasonic signals with an external transducer sensor element.
2.2
Basic Operation
The PGA450-Q1 device can operate from either OTP or DEVRAM memory, and from the LIN, UART, or
SPI communication interfaces. Because of the various methods of operation, the configuration of OTP
memory and UART communication for initial evaluation, development, and debug is used as the basic
operation example throughout this document. To burst and capture an ultrasonic profile, the user must
connect a 5-V logic-level compatible UART-to-USB interface device, and send the corresponding
commands discussed in
. The details of this section are limited to the minimum requirements
because this user's guide assumes that the user has fully evaluated the PGA450Q1EVM, which provides
more extensive and elaborate details.
2.2.1
Programming the PGA450-Q1 DEVRAM or OTP Memory
The PGA450Q1EVM-S memory is preprogrammed to operate from OTP memory, meaning that the
PGA450-Q1 device is permanently programmed with a set of predefined commands as described in
. If the user prefers to customize or modify the firmware for different commands, the PGA450-
Q1 device must be replaced with a pristine PGA450-Q1 device, and follow the instructions provided in this
section. Go to
if the device will not be replaced. Use the steps that follow to program the
device for DEVRAM or OTP memory.
Step 1.
Connect a 12-V system supply voltage to the EVM at J2-1 (MAIN) and connect the SPI pins
of the EVM at J3 to the SPI pins on the TI GER board.