Texas Instruments PGA112EVM, User Manual

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TUSB3210
8052
m
C
w/USB Interface
and UART
USB Bus
from
Computer
3.3-V
Regulator
+3.3 V
USB
+5.0 V
8K x 8 Byte
EEPROM
Buffers and
Level
Translators
Power
Switching
Vdut
(Hi-Z, 3.3 V, or 5 V)
Switched Power
I
2
C
SPI
Control Bits
Measure Bits
Power on
Reset
SM-USB-DIG Platform
T
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+3.3 V
USB +5.0 V
EVM Hardware Setup
www.ti.com
2.2 Signal Definitions of J1 (10-Pin Male Connector Socket)
Table 2 shows the pin out for the 10-pin connector socket used to communicate between the EVM and the
SM-USB-DIG. Note that the EVM uses only the I
2
C communication lines, VDUT (pin 6), GND (pin 8), and
CTRL/MEAS4 (pin 2).
Table 2. SM-USB-DIG Pin Definitions
Pin on U1 Signal Description
1 I2C_SCL I
2
C clock signal (SCL)
2 CTRL/MEAS4 GPIO. Control output or measure input
3 I2C_SDA1 I
2
C data signal (SDA)
4 CTRL/MEAS5 GPIO. Control output or measure input
5 SPI_DOUT1 SPI data output (MOSI)
Switchable DUT power supply: +3.3 V, +5 V, Hi-Z (disconnected).
6 VDUT
NOTE: When VDUT is Hi-Z, all digital I/O are also Hi-Z.
7 SPI_CLK SPI clock signal (SCLK)
8 GND Power return (GND)
9 SPI_CS1 SPI chip select signal (CS)
10 SPI_DIN1 SPI data input (MISO)
2.3 Theory of Operation for SM-USB-DIG Platform
Figure 3 shows the block diagram for the SM-USB-DIG Platform. This platform is a general-purpose data
acquisition system that is used on several different Texas Instruments evaluation modules. The details of
its operation are included in the SM-USB-DIG Platform User's Guide (
SBOU098 ). The block diagram
shown in Figure 3 is given as a brief overview of the platform.
Figure 3. SM-USB-DIG Platform Block Diagram
The primary component of the SM-USB-DIG Platform is the TUSB3210 , an 8052 microcontroller with a
built-in USB interface. The microcontroller receives information from the host computer that is interpreted
into power, I
2
C, SPI, and other digital I/O methods. During the digital I/O transaction, the microcontroller
reads the response of any device connected to the I/O interface. The response from the device is sent
back to the PC, where it is interpreted by the host computer.
4 PGA112EVM and PGA113EVM User’s Guide SBOU073A – February 2009 – Revised May 2012
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