PCM5122/42EVM-U
w E0 0E 01
#----- Setup DIT -----#
# DIT COnfig 1
# Port A data in, DIv 256
w E0 07 80
# DIT Config 2
# Default is to output to RCA
# Comment out RCA and uncomment Optical for optical outputs
#Output to RCA
# TX - ON, TX MUTE - ON, Optical disabled
#w E0 08 06
# TX Mute - OFF
#w E0 08 04
#Output to Optical
# TX - OFF, TX MUTE - ON, optical disabled
w E0 08 03
# TX MUTE - OFF
w E0 08 01
#----- PLL Configuration -----#
# Set P=2, J=8, D=0
w E0 0F 22
w E0 10 1B
w E0 11 A3
# GPIO1 Config
# GPIO1 = RCVR non-audio data
w E0 1B 06
# GPIO2 Config
# GPIO2 = RCVR non-valid data
w E0 1C 07
# Power Status
# Disable RCVR (/PDRX) and Port B(/PDPB) power down and enable All Function power down
#w E0 01 14
#w E0 03 29
2.6.4
Optical/SPDIF Input via J4 (48 kHz, RXCKO Master Clock)
# RESET RESET THIS IS MASTER RESET FOR SRC
# SW3 (2-7) turned on, rest turned off
# Page 0 = DEFAULT for Control
# Write to page 0
w E0 7F 00
# Register 01, Bit 7 = 1 resets to default
d 100
w E0 01 80
# Delay 0.1 sec to allow part to reset
d 100
# Register 01, Bit 7 = 0 for normal operation
w E0 01 00
d 100
# w E0 7F 00
# Register 01, Bit 7 = 1 resets to default
#----- Setup Port A ------#
# 24bit I2S, Master mode, DIR source, at mute
# Divide by 256, MCLK input source
w E0 03 69
w E0 04 0B
#----- Setup DIR ------#
8
PCM5122/42EVM-U
SLAU444 – May 2012
Copyright © 2012, Texas Instruments Incorporated
