Texas Instruments PCM1840EVM, User Manual, Page: 3 / 21

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Introduction
3 SBAU345 – March 2020
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Copyright © 2020, Texas Instruments Incorporated
PCM1840 Evaluation Module
1 Introduction
The PCM1840EVM is an evaluation module (EVM) designed to demonstrate the performance and
functionality of the PCM1840 device. The PCM1840 is a high-performance audio analog-to-digital
converter (ADC) that is configured through logic-level mode selection pins and does not require a digital
interface such as I2C or SPI to configure registers. As such, no software is necessary to interface with the
EVM. The EVM is powered with a single 5-V supply. Access to the converter output is provided on the
audio serial interface in I2S, LJ, or TDM format.
2 Power Supply
The PCM1840EVM can be powered with a single 5-V power supply connected to J6. Onboard low dropout
regulators convert the 5-V supply to the 3.3-V and 1.8-V rails used by the ADC. The analog supply,
AVDD, is fixed at 3.3 V. The digital supply, IOVDD, can be set to either 1.8 V or 3.3 V with J5. It is also
possible to power the ADC directly by removing J9 and J5 and applying a voltage directly to the AVDD
and IOVDD test points. Note that if this is done, it is important to keep J10 populated (or ensure there is a
path between the pins if the supply current is being monitored) as this jumper connects the applied IOVDD
to the mode selection pins and other circuitry that relies on IOVDD. If external supplies are used, there is
an onboard voltage supervisor, U3, that will hold the ADC in shutdown until both AVDD and IOVDD have
reached their respective threshold voltages. The shutdown thresholds for the supply voltages can be
adjusted as shown in
Equation 1 and Equation 2 . The supervisor can also be removed from the shutdown
logic by depopulating R5. For more information on the reset supervisor, see the TPS37xx Dual-Channel,
Low-Power, High-Accuracy Voltage Detectors Data Sheet .
(1)
(2)
3 Hardware Configuration
The format of the audio data and the operating mode of the ADC are controlled by the following pins:
MD0, MD1, MSZ, FMT0, and FMT1. These signals are referenced to IOVDD and can be set to high (1) or
low (0). If no shunt is installed, then a 10-k
Ω
pulldown resistor will set the pin low so that the ADC remains
in a defined state. Table 1 shows the header numbers and their pin functions and Table 2 shows the
possible modes and output formats. The MSZ pin selects whether the device is a master or a slave on the
audio bus. When MSZ is pulled high, the device is in slave mode and MD1 becomes an input for MCLK. A
shunt connecting J19 to the center pin of J18 will route the MCLK signal provided on J8 to the MD1 pin on
the ADC to allow for easy interfacing with audio measurement equipment.
Table 1. PCM1840 EVM Headers and Jumpers
Designator Function
J1 Differential line, microphone input 1
J2 Differential line, microphone input 2
J3 Differential line, microphone input 3
J4 Differential line, microphone input 4
J5 IOVDD-SYS voltage selection (1.8 V or 3.3 V)
J6 +5-V supply input
J7 Connector to AC-MB
J8 Digital audio serial interface
J9 Connect AVDD to onboard 3.3-V regulator
J10 Connect IOVDD to IOVDD-SYS
J13 MSZ select
J14 Connect MICBIAS to onboard microphone
J15 Microphone OUT+ to ADC IN1P