Texas Instruments PCM1802EVM, User Manual, Page: 3 / 20

4 Hardware Configuration
The audio data format and the ADC operating mode are controlled by the MODE0, MODE1, FMT0, FMT1, OSR,
BYPAS, and PWDN pins. These signals are referenced to VDD and can be set to high (1) or low (0). If no shunt
is installed, then an internal 50-kΩ pulldown resistor sets the pin low so that the ADC remains in a defined state.
Table 4-1 shows the header numbers and their pin functions and Table 4-2 , Table 4-3 , Table 4-4 , Table 4-5 , and
Table 4-6 list the possible modes, output formats, and other functions of the device.
MODE0 and MODE1 are used to select the serial audio data communication timing and must be set prior to
power on. In controller mode, BCK and LRCK are output pins that are generated by internal divider circuitry
from the SCKI input. Thus, SCKI must be a valid multiple of the intended sample rate. The frequency of BCK is
constant at 64 BCKs per frame.
In peripheral mode, BCK and LRCK function as input pins. The device accepts either 64-BCKs per frame or
48-BCKs per frame format (only for a 384 f
S
system clock), but not a 32-BCK per frame format. Although BCK
and LRCK are no longer derived from SCKI in peripheral mode, a valid SCKI is still required for operation.
Table 4-1. PCM1802EVM and PCM1803AEVM Headers and Jumpers
Designator Function
J9 Audio serial interface: system clock input (SCK_IN)
J8 Audio serial interface: bit-clock input or output (BCK)
J15 Audio serial interface: latch-enable input or output (LRCLK)
J18 Audio serial interface: digital data output (DOUT)
J16 PCM1802 only: Frame synchronous clock input and output (FSYNC)
J4 System clock source select (SCKI)
J10 Format [0] select (FMT0)
J11 Format [1] select (FMT1)
J3 Mode [0] select (MODE0 and MD0)
J6 Mode [1] select (MODE1 and MD1)
J12 Oversampling ratio select (OSR)
J13 High-pass filter bypass control select (BYPAS)
J14 Power-down control (nPWDN)
J7 Analog audio input: right
J5 Analog audio input: left
J17 5-V supply input
J1 VDD, 3.3-V jumper wire
J2 VCC, 5-V jumper wire
Table 4-2. PCM1802 and PCM1803A Mode Settings
MODE1, MD1 MODE0, MD0 Interface Mode
0 0 Peripheral mode (256 f
s
, 384 f
s
, 512 f
s
, and 768 f
s
)
0 1 Controller mode (512 f
s
)
1 0 Controller mode (384 f
s
)
1 1 Controller mode (256 f
s
)
Table 4-3. PCM1802 and PCM1803A Format Settings
FMT1 FMT0 Format
0 0 Left-justified, 24-bit
0 1 I
2
S, 24-bit
1 0 Right-justified, 24-bit
1 1 Right-justified, 20-bit
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SBAU384 – JULY 2021
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PCM1802EVM and PCM1803AEVM Evaluation Module 3
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