Texas Instruments PCA9306, User Manual, Page: 5 / 13

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Hardware Description
5 SCPU039 – October 2018
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Copyright © 2018, Texas Instruments Incorporated
PCA9306 I
2
C Buffer Evaluation Module
3 Hardware Description
The PCA9306 EVM is designed to allow the user to easily evaluate the I
2
C buffer for a variety of
conditions. The breakdown of all the features and design of the EVM follows:
Figure 4. PCA9306EVM test points, devices, resistors, and capacitor map.
1. VDPU1 is the supply for BUS1 and VDPU2 is the supply for BUS2. VDPU2 must be greater than or
equal to VDPU1 + 0.7 V.
2. Test point for EN pin, which allows the user to disable the translator.
3. Test points for SCL1 and SDA1 on BUS1 side of translator, which is referenced to VDPU1.
4. Test points for SCL2 and SDA2 on BUS2 side of translator, which is referenced to VDPU2.
5. Footprint for additional pullup resistors (R6 and R8) on SDA2 and SCL2, which allows increasing
pullup strength by placing a resistor in parallel with the 10k already placed on the board (R5 and R7).
6. Footprint for additional pullup resistors (R2 and R4) on SDA1 and SCL1, which allows increasing
pullup strength by placing a resistor in parallel with the 10k already placed on the board (R1 and R3).
7. Footprint for adding capacitor to SDA1 and SCL1(C3 and C4) to test desired capacitive load.
8. Footprint for adding capacitor to SDA2 and SCL2(C6 and C5) to test desired capacitive load.
9. Test points for ground.