USB Transactions
13-65
USB Function Module
13.3.4.1
Isochronous IN Endpoint Handshaking
Because isochronous endpoint transactions have no handshake packets, the
STALL, the NAK, and the ACK bits for isochronous endpoints always return
0. Because there is no handshake, there is no endpoint-specific interrupt to the
local host to report handshake results for isochronous endpoints.
13.3.4.2
Isochronous IN Transaction Error Conditions
If the USB host did not successfully complete an isochronous IN transaction
in the previous frame and if data were present in the TX FIFO to be sent at the
IN transaction, the Miss_In bit is asserted for the duration of the following
frame. If the isochronous IN endpoint is cleared in the middle of a USB transac-
tion to the background FIFO, a bit-stuffing error is forced for the isochronous
transaction.
13.3.4.3
Isochronous IN Endpoint FIFO Error Conditions
If the local host attempts to overfill the configured endpoint FIFO, data written
to the DATA register after the TX FIFO is full is lost, but any data that was suc-
cessfully put into the FIFO is transmitted when that FIFO is the background
FIFO and an IN transaction for that endpoint occurs. Since an isochronous TX
FIFO is cleared automatically on the toggle from background to foreground,
there is no reason to clear the FIFO. However, if the local host does not wish
to send the data it wrote, clearing the endpoint is the only mechanism to do this.
13.3.5 Control Transfers on Endpoint 0
Control transfers on endpoint 0 include control write and control read transfers.
Control write and control read transfers are each composed of two or more
transactions to endpoint 0. Additionally, the USB function module is capable
of autodecoding some control write and control read transfers. These opera-
tions are summarized in Figure 13–7 and Figure 13–8. If an IN or OUT trans-
action is received in a control request, this transaction is automatically stalled
by the core.
