UART/IrDA Control and Status Registers
12-69
UART Devices
The IRQ output is activated whenever one of the 8 interrupts is active.
Table 12–58. SIR Mode Interrupt Identification Register (SIR_IIR)
Bit
Name
Value
Function
R/W
Reset
Value
7
EOF_IT
0
Received EOF interrupt inactive
R
0
1
Received EOF interrupt active
6
LINE_STS_IT
0
Receiver line status interrupt inactive
R
0
1
Receiver line status interrupt active
5
TX_UE_IT
0
TX underrun interrupt inactive
R
0
1
TX underrun interrupt active
4
STS_FIFO_IT
0
Status FIFO trigger level interrupt inactive
R
0
1
Status FIFO trigger level interrupt active
3
RX_OE_IT
0
RX overrun interrupt inactive
R
0
1
RX overrun interrupt active
2
RX_FIFO_LAST_
BYTE_IT
0
Last byte of frame in RX FIFO interrupt
inactive
R
0
1
Last byte of frame in RX FIFO interrupt
active
1
THR_IT
0
THR interrupt inactive
R
0
1
THR interrupt active
0
RHR_IT
0
RHR interrupt inactive
R
0
1
RHR interrupt active