Texas Instruments OMAP36 Series, Technical Reference Manual

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PRCM Register Manual
Table 3-495. PRM_VP2_VSTEPMAX
Address Offset 0x0000 00D8
Physical Address 0x4830 72D8 Instance Global_Reg_PRM
Description This register allows the programming of the maximum voltage step and waiting time of the Voltage
Processor 2 (VDD2).
Type RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED SMPSWAITTIMEMAX VSTEPMAX
Bits Field Name Description Type Reset
31:24 RESERVED Write 0s for future compatibility. Read is undefined. R 0x00
23:8 SMPSWAITTIMEMAX Slew rate for positive voltage step (in number of cycles RW 0x0000
per step).
7:0 VSTEPMAX Maximum voltage step RW 0x00
Table 3-496. Register Call Summary for Register PRM_VP2_VSTEPMAX
PRCM Basic Programming Model
• Voltage Processor Registers : [0]
PRCM Register Manual
• Global_Reg_PRM Register Summary : [1]
Table 3-497. PRM_VP2_VLIMITTO
Address Offset 0x0000 00DC
Physical Address 0x4830 72DC Instance Global_Reg_PRM
Description This register allows the configuration of the voltage limits and timeout values of the Voltage Processor 2
(VDD2).
Type RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
VDDMAX VDDMIN TIMEOUT
Bits Field Name Description Type Reset
31:24 VDDMAX Defines the maximum voltage supply level. RW 0x00
23:16 VDDMIN Defines the minimum voltage supply level. RW 0x00
15:0 TIMEOUT Defines Voltage Controller maximum wait time for RW 0x0000
responses.
Table 3-498. Register Call Summary for Register PRM_VP2_VLIMITTO
PRCM Basic Programming Model
• Voltage Processor Registers : [0]
• PRM_VP_VLIMITTO (Voltage Processor Voltage Limit and Time-Out) : [1]
PRCM Register Manual
• Global_Reg_PRM Register Summary : [2]
647 SWPU177N – December 2009 – Revised November 2010 Power, Reset, and Clock Management
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