
Public Version
PRCM Register Manual
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Table 3-479. PRM_VP1_CONFIG
Address Offset
0x0000 00B0
Physical Address
0x4830 72B0
Instance
Global_Reg_PRM
Description
This register allows the configuration of the Voltage Processor 1 (VDD1).
Type
RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
ERROROFFSET
ERRORGAIN
INITVOLTAGE
RESERVED
INITVDD
VPENABLE
TIMEOUTEN
FORCEUPDATE
Bits
Field Name
Description
Type
Reset
31:24
ERROROFFSET
Offset value in the Error to Voltage converter (two's
RW
0x00
complement number).
23:16
ERRORGAIN
Gain value in the Error to Voltage converter (two's
RW
0x00
complement number).
15:8
INITVOLTAGE
Set the initial voltage level of the SMPS. It must be
RW
0x00
reconfigured before SmartReflex is enabled around a
new OPP.
7:4
RESERVED
Write 0s for future compatibility. Read is undefined.
R
0x0
3
TIMEOUTEN
Enable or disable the timeout capability of the Voltage
RW
0x0
Controller State Machine.
0x0: Timeout is disabled. Loop will wait indefinitely.
0x1: Timeout will occur when TIMEOUT cycles have
elapsed.
2
INITVDD
Initializes the voltage in the Voltage Processor.
RW
0x0
0x0: Reset the initialization bit.
0x1: The positive edge of InitVdd triggers a write of the
value in the InitVoltage into the Voltage Processor.
1
FORCEUPDATE
Forces an update of the SMPS.
RW
0x0
0x0: Reset the force bit.
0x1: The positive edge of ForceUpdate triggers an
update of the voltage to the SMPS.
0
VPENABLE
Enables or disables the Voltage Processor.
RW
0x0
0x0: Disables the Voltage Processor.
0x1: Enables the Voltage Processor.
Table 3-480. Register Call Summary for Register PRM_VP1_CONFIG
PRCM Basic Programming Model
•
:
•
PRM_VP_CONFIG (Voltage Processor Configuration Register)
:
PRCM Use Cases and Tips
•
Device SmartReflex Initialization
:
•
:
PRCM Register Manual
•
Global_Reg_PRM Register Summary
:
642
Power, Reset, and Clock Management
SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated