Texas Instruments OMAP36 Series, Technical Reference Manual, Page: 585 / 3738

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PRCM Register Manual
Bits Field Name Description Type Reset
12 ST_GPT11 GPTIMER 11 Wake-up status RW 0x0
Read 0x0: GPTIMER 11 wake-up did not occur or was
masked.
Write 0x0: Status bit unchanged
Read 0x1: Status bit is cleared to 0.
Write 0x1: GPTIMER 11 wake-up occurred.
11 ST_GPT10 GPTIMER 10 Wake-up status RW 0x0
Read 0x0: GPTIMER 10 wake-up did not occur or was
masked.
Write 0x0: Status bit unchanged
Read 0x1: GPTIMER 10 wake-up occurred.
Write 0x1: Status bit is cleared to 0.
10 ST_MCBSP5 McBSP 5 Wake-up status RW 0x0
Read 0x0: McBSP 5 wake-up did not occur or was
masked.
Write 0x0: Status bit unchanged
Read 0x1: McBSP 5 wake-up occurred.
Write 0x1: Status bit is cleared to 0.
9 ST_MCBSP1 McBSP 1 Wake-up status RW 0x0
Read 0x0: McBSP 1 wake-up did not occur or was
masked.
Write 0x0: Status bit unchanged
Read 0x1: McBSP 1 wake-up occurred.
Write 0x1: Status bit is cleared to 0.
8:5 RESERVED Write 0s for future compatibility. Read returns 0. R 0x0
4 ST_HSOTGUSB HS OTG USB Wake-up status RW 0x0
Read 0x0: HS OTG USB wake-up did not occur or was
masked.
Write 0x0: Status bit unchanged
Read 0x1: HS OTG USB wake-up occurred.
Write 0x1: Status bit is cleared to 0.
3:0 RESERVED Write 0s for future compatibility. Read returns 0. R 0x0
Table 3-350. Register Call Summary for Register PM_WKST1_CORE
PRCM Basic Programming Model
• PM_WKST_ <domain_name> (Wake-Up Status Register) : [0]
PRCM Register Manual
• CORE_PRM Register Summary : [1]
Table 3-351. PM_WKST3_CORE
Address Offset 0x0000 00B8
Physical Address 0x4830 6AB8 Instance CORE_PRM
Description This register logs module wake-up events. Must be cleared by software. If it is not cleared, it prevents
further domain transition.
Type RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED
RESERVED ST_USBTLL
585 SWPU177N – December 2009 – Revised November 2010 Power, Reset, and Clock Management
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