Texas Instruments OMAP36 Series, Technical Reference Manual

Page: 392 / 3738

Device
PRCM
System control
module
R
e
se
t
W
uc
lo
c
k
W
uc
lo
c
k
W
uc
lo
c
k
W
uc
lo
c
k
WUEVT
WUEVT
W
U
E
V
T
W
U
E
V
T
WUEVT
WUEVT
E
v
e
n
t
E
v
e
n
t
R
e
s
e
t
Reset
Event log
Device wu event
Reset
R
e
s
e
t
R
e
se
t
E
v
e
n
t
E
v
e
n
t
Pad
off mode
logic
Event log
Off mode
daisy chain
E
v
e
n
t
lo
g
Event log
Event log
E
v
e
n
t
lo
g
EVT_EN
EVT_EN
EV
T
_
EN
EV
T_
EN
EVT_EN
EVT_EN
I/O pad
Legend
Restore
done
Start
restore
Pad
off mode
logic
Pad
off mode
logic
prcm-077
Pad
off mode
logic
Pad
off mode
logic
Pad
off mode
logic
Wu clock
Wu clock
Public Version
PRCM Functional Description
www.ti.com
Figure 3-86. Device Off-Mode Control Overview
3.5.7.2.2 I/O Wake-Up Mechanism
There are two ways to capture an I/O event. The expected way is to use GPIO modules. However, these
modules may be powered-off when there is a need to capture an I/O event. The second way to capture an
I/O event is through an I/O wake-up scheme controlled by the I/O daisy chain.
Only one GPIO module is in the WKUP domain, which is not switchable, and the other GPIO modules are
in the PER domain, which is switchable. Therefore, the I/O wake-up scheme for the corresponding I/O
must be enabled before transitioning the PER domain to a nonfunctional state. This typically happens
when the device is programmed to enter OFF state.
During off mode, only six pins of the GPIO module in the WAKEUP domain are wake-up capable;
therefore, the I/O wake-up scheme must be enabled for the other 26 I/Os before transitioning to OFF
state.
The I/O wake-up scheme can be enabled when the PER domain is in ACTIVE state.
Software must enable and disable the I/O wake-up scheme and ensure an overlap window between the
GPIO wake-up capability and the I/O wake-up capability. Software must manage this overlap window.
The I/O wake-up scheme in each pad is enabled through the I/O daisy chain:
•
The I/O wake-up capability is enabled by programming the corresponding register
(CONTROL.CONTROL_PADCONF_X) in the control module.
• The global I/O wake-up enable bit is enabled by programming a dedicated register
(PRCM. PM_WKEN_WKUP [8] EN_IO) in the PRCM module.
• The I/O wake-up scheme is enabled by triggering the I/O daisy chain control (Wu clock) by
programming a dedicated register (PRCM.
PM_WKEN_WKUP [16] EN_IO_CHAIN) in the PRCM
module.
392 Power, Reset, and Clock Management SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated