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High-Speed USB Host Subsystem
NOTE:
Modules, highlighted in orange in
has removed functionality in the OMAP36xx in
CYN package devices. The module is still present on the die; therefore, its mappings are
provided to control its activity and for debug purposes.
Table A-30. McBSP Instance Summary
Module Name
Base Address (hex)
Size
McBSP1
0x4807 4000
4KB
McBSP5
0x4809 6000
4KB
McBSP2
0x4902 2000
4KB
McBSP3
0x4902 4000
4KB
McBSP4
0x4902 6000
4KB
SIDETONE_McBSP2
0x4902 8000
4KB
SIDETONE_McBSP3
0x4902 A000
4KB
A.15.3 McBSP Use Guidelines
For the unsupported McBSP4 module, next guidelines must be followed:
•
Keep MCBSPLP_SYSCONFIG_REG[4:3] SIDLEMODE = 0x0.
•
Keep MCBSPLP_SYSCONFIG_REG[2] ENWAKEUP = 0x0.
•
Keep MCBSPLP_SYSCONFIG_REG[9:8] CLOCKACTIVITY= 0x0.
•
Keep all interrupts masked.
For McBSP1, next guidelines must be followed:
•
In receive-and-transmit master mode, mcbsp1_clkr must be used in the role of clock output.
•
In receive-and-transmit slave mode, mcbsp1_clkr must be used in the role of clock input. I this case
the transmitter clock (CLKX_int ) cannot be directly delivered from mcbsp1_clkr pin. Sample rate
generator (SRG) must be configured to get clock from the mcbsp1_clkr pin, in order to generate the
internal data clock (CLKG) clock, which in turn must be routed to the transmitter (CLKX_int clock).
OMAP36xx TRM Clocking and Framing Data and McBSP SRG functional description subsections in the
Multichannel Buffered Serial Port chapter provide basic concept for the McBSP data clocking and framing.
McBSP Basic Programming Model section in the OMAP36xx TRM describes the McBSP and SRG
intialization.
A.16 High-Speed USB Host Subsystem
A.16.1 Overview
The high-speed universal serial bus (USB) host subsystem is composed of the high-speed multiport USB
host controller and the USBTLL module.
The USB controller is a high-speed multiport USB2.0 host controller. It contains two independent, 2-port
host controllers that operate in parallel:
•
The EHCI controller
•
The OHCI controller.
Each USB port (1 and 2) can connect either to an external-to-device chip USB transceiver or directly using
a transceiverless link to an external IC supporting the same TLL protocol.
Third HSUSB host port (port 3) is featured by the HS USB host controller, but is not accessible outside the
OMAP36xx in CYN package devices.
All die pads, that are not connected to any pins on the OMAP36xx in CYN package are shown
highlighted in
, Pad Multiplexing Register Fields. Same section also provides information
about the multiplexing capabilities of each pin.
3695
SWPU177N – December 2009 – Revised November 2010
OMAP36xx Multimedia Device in CYN Package
Copyright © 2009–2010, Texas Instruments Incorporated
