PRCM
sys_clkreq
sys_xtalin
sys_boot6
sys_clkout2
PRM
CM
sys_32k
a3621-009
Device
VIO
tie_sys_boot46
Public Version
Power, Reset, and Clock Management
www.ti.com
Table A-3. L4-Peripheral Memory Space Mapping (continued)
Device Name
Start Address
End Address
Size
Description
(Hex)
(Hex)
GPIO6
0x4905 8000
0x4905 8FFF
4KB
Module
0x4905 9000
0x4905 9FFF
4KB
L4 interconnect
Reserved
0x4905 A000
0x490F FFFF
664KB
Reserved
A.3
Power, Reset, and Clock Management
A.3.1 PRCM Environment
The following signals are supported by the PRCM module, but are not available at the OMAP36xx in CYN
package device boundary:
•
Signal sys_xtalout of the built-in high-speed oscillator, intended to drive a quartz crystal (clock master
mode is not supported)
•
Clock output sys_clkout1 cannot be used to supply external devices with clock (clock master mode is
not supported)
•
sys_altclk clock input for PLLs, NTSC standard (54 MHz), and USB full-speed (FS) controller (48 MHz)
is not supported.
shows the external clock signals of the PRCM module, valid for the OMAP36xx in CYN
package devices.
lists the external clock signals, I/Os, and module reset values. Highlighted
rows represent non-functional pins in OMAP36xx in CYN package devices.
Figure A-2. External Clock Interface
3658
OMAP36xx Multimedia Device in CYN Package
SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated
