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MMC/SD/SDIO Register Manual
Bits
Field Name
Description
Type
Reset
15
ERRI
Error Interrupt.
R
0
If any of the bits in the Error Interrupt Status register
(MMCi.
[31:16]) are set, then this bit is set to 1. Therefore the
host driver can efficiently test for an error by checking this bit first.
Writes to this bit are ignored.
Read 0x0:
No Interrupt
Read 0x1:
Error interrupt event(s) occurred
14:10
Reserved
Reserved bit field. Do not write any value.
R
0x00
9
OBI
Out-Of-Band interrupt (This interrupt is only useful for MMC card).
R
0
This bit is set automatically when MMCi.
[14] OBIE bit is set
and an Out-of-Band interrupt occurs on OBI pin.
The interrupt detection depends on polarity controlled by
MMCi.
[13] OBIP bit.
The Out-of-Band interrupt signal is a system specific feature for future use,
this signal is not required for existing specification implementation.
Read 0x0:
No Out-Of-Band interrupt.
Write 0x0:
Status bit unchanged.
Read 0x1:
Interrupt Out-Of-Band occurs.
Write 0x1:
Status is cleared.
8
CIRQ
Card interrupt.
R
0
This bit is only used for SD and SDIO cards.
In 1-bit mode, interrupt source is asynchronous (can be a source of
asynchronous wakeup).
In 4-bit mode, interrupt source is sampled during the interrupt cycle.
In CE-ATA mode, interrupt source is detected when the card drives
mmci_cmd line to zero during one cycle after data transmission end.
All modes above are fully exclusive.
The controller interrupt must be clear by setting MMCi.
[8]
CIRQ_ENABLE to 0, then the host driver must start the interrupt service with
card (clearing card interrupt status) to remove card interrupt source.
Otherwise the Controller interrupt will be reasserted as soon as
MMCi.
[8] CIRQ_ENABLE is set to 1.
Writes to this bit are ignored.
Read 0x0:
No card interrupt
Read 0x1:
Generate card interrupt
7:6
Reserved
Reserved bit field. Do not write any value.
RW
00
5
BRR
Buffer read ready.
RW
0
This bit is set automatically during a read operation to the card (see class 2 -
block oriented read commands) when one block specified by the
MMCi.
[10:0] BLEN bit field is completely written in the buffer. It
indicates that the memory card has filled out the buffer and that the local
host needs to empty the buffer by reading it.
Note: If the DMA receive-mode is enabled, this bit is never set; instead a
DMA receive request to the main DMA controller of the system is generated.
Read 0x0:
Not Ready to read buffer
Write 0x0:
Status bit unchanged
Read 0x1:
Ready to read buffer
Write 0x1:
Status is cleared
4
BWR
Buffer write ready.
RW
0
This bit is set automatically during a write operation to the card (see class 4 -
block oriented write command) when the host can write a complete block as
specified by MMCi.
[10:0] BLEN. It indicates that the memory
card has emptied one block from the buffer and that the local host is able to
write one block of data into the buffer.
Note: If the DMA transmit mode is enabled, this bit is never set; instead, a
DMA transmit request to the main DMA controller of the system is
generated.
Read 0x0:
Not Ready to write buffer
Write 0x0:
Status bit unchanged
Read 0x1:
Ready to write buffer
Write 0x1:
Status is cleared
3451
SWPU177N – December 2009 – Revised November 2010
MMC/SD/SDIO Card Interface
Copyright © 2009–2010, Texas Instruments Incorporated