Texas Instruments OMAP36 Series, Technical Reference Manual

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High-Speed USB Host Subsystem
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Bits Field Name Description Type Reset
This field is 0 if the PP bit is 0.
Write 0x1: Enables the port to be sensitive to device connects as wake-up
events.
19:16 PTC Port Test Control RW 0x0
The port is operating in specific test modes as indicated by the specific
value. The encoding of the test mode bits are:
0x0: Test mode not enabled
0x1: Test J_STATE
0x2: Test K_STATE
0x3: Test SE0_NAK
0x4: Test Packet
0x5: Test FORCE_ENABLE
Others: Reserved
15:14 PIC Port Indicator Control (not implemented) R 0x0
13 PO Port Owner RW 1
This bit unconditionally goes to a 0x0 when the
USBHOST.
CONFIGFLAG [0] CF bit makes a 0 to 1 transition. This bit
unconditionally goes to 0 whenever the USBHOST. CONFIGFLAG [0] CF
bit is 0.
0x1: A companion host controller owns and controls the port.
12 PP Port Power RW 0
The function of this bit depends on the value of the
USBHOST.
HCSPARAMS [4] PPC bit. The behavior is as follows:
PPC PP Operation
0x0 0x1 Host controller does not have port power.
control switches. Each port is hard-wired to
power.
0x1 N/A Host controller has port power control
switches. This bit represents the current
setting of the switch (0 = Off, 1 = On).
When an overcurrent condition is detected on a powered port and the
USBHOST.
HCSPARAMS [4] PPC bit is a 1, the PP bit in each affected
port may be transitioned by the host controller from 1 to 0.
11:10 LS Line Status R 0x0
These bits reflect the current logical levels of the D+ (bit 11) and D– (bit
10) signal lines. This field is valid only when the port enable bit is 0 and
the current connect status bit is set to 1. The encoding of the bits is:
Bits[11:10] USB Interpretation
State
0x0 SE0 Not low-speed device, perform EHCI reset.
0x2 J-state Not low-speed device, perform EHCI reset.
0x1 K-state Low-speed device, release ownership of
port.
0x3 Undefine Not low-speed device, perform EHCI reset.
d
9 RESERVED Reserved R 0
8 PR Port Reset RW 0
This field is 0 if the PP bit is 0.
0x0: Port is not in reset.
0x1: Port is in reset.
Write 0x0: Terminate the bus reset sequence.
Write 0x1 when at 0x0: The bus reset sequence is started.
7 SUS Suspend RW 0
This field is 0 if the PP bit is 0.
3354 High-Speed USB Host Subsystem and High-Speed USB OTG Controller SWPU177N – December 2009 – Revised November 2010
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