
Public Version
PRCM Functional Description
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If the
[1] CLKREQ_POL bit = 0, the internal pullup on the sys_clkreq pad, or an external
pull-up, is connected to the pad.
In master mode in the system clock oscillator (see
), sys_clkreq is an input.
If the
[1] CLKREQ_POL bit = 1, the software must configure the SCM to select the
internal pulldown on the sys_clkreq pad, or an external pulldown is connected to the pad.
If the
[1] CLKREQ_POL bit = 0, the internal pullup on the sys_clkreq pad, or an external
pullup, is connected to the pad.
The PRCM.
[1] CLKREQ_POL bit allows software control over the polarity of sys_clkreq.
This software setting takes effect when the clock is requested by the device, and also when the clock
request is driven externally. The output buffer is driven directly by this register when the clock request
comes from device.
describes the bidirectional control of the sys_clkreq pad.
Table 3-35. sys_clkreq Pad Direction Control
Internal Clock
External Clock Request
Oscillator
Sys_boot
Request (Always
(Note: polarity depends Sys_clkreq Direction
Description
Mode
6
Active-High)
on CLKREQ_POL)
Master mode
0
0
0
(1)
Input (output buffer in
The clock is not requested internally
Hi-Z)
(by the device) or externally
(external device/peripheral).
Note: Input is not driven
from outside of device in
this case.
0
0
1
(1)
Input (output buffer in
The clock is requested externally.
Hi-Z)
0
1
0
(1)
Output
The clock is requested internally.
0
1
1
(1)
Output
The clock is requested internally
and externally.
Note: The pad is driven
both by device and from
outside of device in this
case.
Bypass mode
1
0
0
(1)
Input (output buffer in
The clock is not requested internally
Hi-Z)
or externally.
Note: Input is not driven
from outside of device in
this case).
1
0
1
(1)
Input (output buffer in
The clock is requested externally.
Hi-Z)
1
1
0
(1)
Output
The clock is requested internally.
1
1
1
(1)
Output
The clock is requested internally
and externally.
Note: The pad is driven
by device and from
outside of device in this
case.
(1)
Case when PRM_POLCTRL.CLKREQ_POL = 1 (sys_clkreq active high). If PRM_POLCTRL.CLKREQ_POL = 0 (sys_clkreq active low),
these values should be inverted in
.
3.5.3.5.2 System Clock Oscillator Control
Depending on the hardware configuration, the device can receive the system clock from an external
source or generate it locally using the internal system clock crystal oscillator. Thus, the device oscillator
has two possible operating modes:
326
Power, Reset, and Clock Management
SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated