Texas Instruments OMAP36 Series, Technical Reference Manual

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SCM Functional Description
Table 13-61. Internal Signals Multiplexed on WKUPOBSMUX13
Pin Name Observed Signal Name WKUPOBSMU Description High State Low State
X13 Field
CONTROL. CO
NTROL_WKUP
_DEBOBS_3 [1
2:8] (dec)
hw_dbg13
(1)
CORE_OBSMUX13 0 Signal multiplexed by OBSMUX13. – –
PRCM_PER_32K_ALWON 1 Always-on 23KHz functional clock of PER – –
_FCLK domain.
PRCM_CORE_RST 2 Reset signal for CORE domain. Reset is not Reset is
active
active
PRCM_DPLL1_RSTPWRO 3 Cold reset signal for DPLL1. Reset is Reset is not
N active active
PRCM_GlblWarmRst_n 4 Global warm reset signal. Reset is Reset is not
active active
PRCM_COREL4_domainW 5 Indicates that a wake-up condition is Conditions Conditions
akeup detected for the COREL4 domain. reached not reached
PRCM_vdd1_domain_is_re 6 Indicates to the global Power Manager FSM State is State is not
t that the VDD1 domain power state is RETENTIO RETENTIO
RETENTION. N N
PRCM_vdd2_domain_is_o 7 Indicates to the global Power Manager FSM State is ON State is not
n that the VDD2 domain power state is ON. ON
PRCM_USBHOST_domain 8 Indicates that a wake-up condition is Conditions Conditions
Wakeup detected for the USBHOST domain. reached not reached
PRCM_IO_ISOCLK 9 PM Input/Output isolation clock. – –
PRCM_MPU_POWER_GO 10 Indicates whether the MPU power switches Power is Power is
OD[2] status (bit 2). stable not stable
PRCM_IVA2_POWER_GO 11 Indicates whether the IVA2 power switches Power is Power is
OD[4] status (bit 4). stable not stable
PRCM_IVA2_SRAMRETG 12 Indicates whether the SRAM retention Power is Power is
OODOUT[1] banks in the IVA2 domain are stable (bit 1). stable not stable
PRCM_CORE_SRAMAGO 13 CORE array Powergood indication from Power is Power is
ODOUT[1] SRAM to PSCON (bit 1). stable not stable
PRCM_NEON_POWER_IS 14 PM command for NEON domain isolation. Isolation is Isolation is
O ON OFF
PRCM_DSS_POWER_GO 15 Indicates whether the DSS power switches Power is Power is
OD[3] status (bit 3). stable not stable
PRCM_EMU_SRAMAONIN 16 SRAM array power control input (bit 0) for Array is Array is not
[0] EMU power domain. powered powered
PRCM_DPLL4_POWER_G 17 Indicates whether the DPLL4 power Power is Power is
OOD[0] switches status (bit 0). stable not stable
PRCM_USBHOST_SRAM 18 SRAM array power control input (bit 0) for Array is Array is not
AONIN[0] USBHOST power domain. powered powered
PRCM_USBTLL_ISO_SAR 19 PM command for USBTLL domain isolation. Isolation is Isolation is
ON OFF
PRCM_GPT1_SWAKEUP 20 FP-Timer1 asserts this signal to initiate a Transition Wakeup
transition to WAKEUP mode. initiated conditions
not reached
Reserved (31:21) – – –
(1)
Mode 5 in MUXMODE1 field CONTROL.CONTROL_PADCONF_DSS_PCLK[18:16]
2517 SWPU177N – December 2009 – Revised November 2010 System Control Module
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