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SmartReflex
TM
, DVFS and DPS
SmartReflex
TM
SmartReflex
TM
, DPS
SLM
Operating points
(voltage, frequency)
Power management technique
(V6,F6)
(V5,F5)
(V4,F4)
(V3,F3)
(V2,F2)
(V1,F1)
Public Version
Introduction to Power Managements
www.ti.com
If DPS cannot be applied in a given context, scaling the frequency while keeping the voltage constant
does not save energy. It does, however, reduce peak power consumption. This can have a positive effect
on temperature dissipation and battery life.
In situations where no applications are running and performance requirement drops to zero, SLM must be
used.
compares combinations of the power-management techniques.
NOTE:
The OPPs shown in
are for explanation only. They do not correspond to
validated OPPs of the device.
Figure 3-4. Performance Level and Applied Power-Management Techniques
3.1.3 Architectural Blocks for Power Management
The device supports the power-management techniques through three architectural blocks: the power,
clock, and voltage domains. A domain is a group of modules or subsections of the device that share a
common entity (clock, voltage, or power switching).
3.1.3.1
Clock Domain
A clock domain is a group of modules fed by the same gated clock signal (see
). By gating the
clock to each domain, it is possible to cut a clock to a group of inactive modules to lower their active
power consumption. Thus, a clock domain allows control of dynamic power consumption by the device.
230
Power, Reset, and Clock Management
SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated