
Group 0
Group 1
Group 2
Group 3
Group 7
Group 6
Class 1
Class 0
.......
Class 2
Request for transaction on group 1 occurs
during transactions on group 0.
Class 1 - group 0 is granted for three consecutive transactions.
To service the other requests (pending or new incoming), wait
until completion of these three transactions.
Request for transaction on class 0 occurs during
transactions on class 1 - group 0.
Requests were present on
group 0 and group 3.
An arbitration decision occurs.
Class 1 was granted the access.
sdrc-028
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SDRAM Controller (SDRC) Subsystem
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Figure 10-71. Example of EXTENDEDGRANT Mechanism
10.2.6.2.3.3 Number of Service Mechanism.
The
[4:0] NOFSERVICES field defines the number of consecutive
transactions (from 1 to 31) the VRFB is granted. For more information on LRU policy and Number of
Service, refer to
.
10.2.6.2.4 How these Mechanisms Interact
As described in the previous sections, the arbitration within the SMS module is based on several
mechanisms giving even more importance to the arbitration. Wen we need to grant the access on a
transaction boundary, we recall that the question we have to answer is: What will be the next request to
be serviced, and for how long?
Thus, the two important concepts regarding the SMS mode of operation are:
•
The arbitration decision: we choose the next request to be serviced and so we grant it the access to
the external memory.
•
The arbitration granularity: depending on the mechanism used, we define the boundary of the
transaction: how long do we keep the grant?
describes the decision happening between classes.
explains the priority between groups within Class 1.
So far, the arbitration decision has taken place at class boundaries and within a class containing two
groups.
recalls the generic way to service and therefore prioritize the requests within a class.
Finally,
recalls mechanisms used to define the boundary of the transaction being serviced
(how long do we keep the grant?).
2290
Memory Subsystem
SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated