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Display Subsystem Basic Programming Model
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7.5.3.2.2 Graphics Layer Configuration Registers
The following registers define the graphics layer configuration:
•
DSS.
•
DSS.
•
DSS.
•
DSS.
The graphics layer is enabled/disabled by setting/resetting the DSS.
GFXENABLE bit. When the graphics layer is disabled, the graphics window does not exist on the screen
and the graphics pipeline and DMA are inactive.
Set a valid configuration before enabling the graphics layer. After a register change, either the
DSS.
[6] GODIGITAL or DSS.
[5] GOLCD bit must be set. The
software must wait for the hardware to reset the bit before setting it. The software reset is not
recommended because the application cannot ensure that the bit is reset before the hardware reset.
7.5.3.2.3 Graphics Window Attributes
The following fields define the attributes of the graphics window:
•
Graphics format (DSS.
[4:1] GFXFORMAT bit field): The default value of
this bit field at reset time is 0x0 (BITMAP 1-BPP). The graphics format can be either: BITMAP1,
BITMAP2, BITMAP4, or BITMAP8 (CLUT) or RGB12, RGB16, or RGB24 (true-color formats).
•
Graphics window X-position (DSS.
[10:0] GFXPOSX bit field): The default
value at reset time is 0x0. The window X-position is from 0 to 2047 columns. All integer values in the
range [0:2047] are allowed.
•
Graphics window Y-position (DSS.
[26:16] GFXPOSY bit field): The default
value of this bit field at reset time is 0x0.The window Y-position is from 0 to 2047 rows. All integer
values in the range [0:2047] are allowed.
•
Graphics window width (DSS.
[10:0] GFXSIZEX bit field): The default value at reset
time is 0x0 (1 pixel). The window width is from 1 to 2048 pixels. All integer values in the range [1:2048]
are allowed for the following formats: 8 BPP, RGB12, RGB16, and RGB24. The width must be a
multiple of eight pixels for 1 BPP, four pixels for 2 BPP, and two pixels for 4 BPP. The maximum
bandwidth efficiency for accessing the pixels in system memory is reached when the width of the
graphics window (in bytes) is a multiple of the graphics burst size defined in the
DSS.
[7:6] GFXBURSTSIZE bit field (in bytes).
NOTE:
When the RGB24 packed format is selected, the width must be a multiple of 12 bytes when
the DSS.
register is not 1. When DSS.
register is 1, the width can be any size from 1 to 2048 pixels.
The entire pixels of the graphics window must be inside the LCD screen. Depending on the
width of the buffer to be displayed in the graphics layer and the position, the width should be
adjusted by software to limit the right edge of the window inside the screen.
•
Graphics window height (DSS.
[26:16] GFXSIZEY bit field): The default value at
reset time is 0x0 (1 pixel). The window height is from 1 to 2048 pixels. All integer values in the range
[1:2048] are allowed. The entire pixels of the graphics window must be inside the LCD screen.
Depending on the height of the buffer to be displayed in the graphics layer and the position, the height
should be adjusted by software to limit the bottom edge of the window inside the screen
•
Graphics data endianness (DSS.
[10] GFXENDIANNESS bit): This bit
indicates the endianness (little or big) of the graphics pixels. The default value at reset time is 0x0 (little
endian).
•
Graphics data nible mode (DSS.
[9] GFXNIBBLEMODE bit): This bit
indicates the nibble mode of the graphics pixels. The default value at reset time is 0x0 (Disable).
•
Graphics replication logic enable (DSS.
[5] GFXREPLICATIONENABLE
bit): The default value at reset time is 0x0 (Disable). The encoded pixel data in RGB format (RGB16)
can be extended to 24-bit format with or without replication of the MSB part to fill up the LSB due to the
24-bit left alignment. If the replication logic is turned off, the LSB part is filled up with 0s.
1710
Display Subsystem
SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated
