EEM Configurations
21.2.5 Clock Control
The EEM provides device-dependent flexible clock control. This is useful in applications where a running
clock is needed for peripherals after the CPU is stopped (for example, to allow a UART module to
complete its transfer of a character or to allow a timer to continue generating a PWM signal).
The clock control is flexible and supports both modules that need a running clock and modules that must
be stopped when the CPU is stopped due to a breakpoint.
21.3 EEM Configurations
gives an overview of the EEM configurations. The implemented configuration is device
dependent, and details can be found in the device-specific data sheet and these documents:
Advanced Debugging Using the Enhanced Emulation Module (EEM) With CCS Version 4
(
IAR Embedded Workbench Version 3+ for MSP430 User's Guide
Code Composer Studio v4.2 for MSP430 User’s Guide
(
Table 21-1. EEM Configurations
Feature
XS
S
M
L
Memory bus triggers
2
3
5
8
(=,
≠
only)
Memory bus trigger mask for
1) Low byte
1) Low byte
1) Low byte
All 16 or 20 bits
2) High byte
2) High byte
2) High byte
3) Four upper addr bits 3) Four upper addr bits 3) Four upper addr bits
CPU register write triggers
0
1
1
2
Combination triggers
2
4
6
10
Sequencer
No
No
Yes
Yes
State storage
No
No
No
Yes
Cycle counter
1
1
1
2
(including
triggered start or stop)
In general, the following features can be found on any device:
•
At least two MAB or MDB triggers supporting:
–
Distinction between CPU, DMA, read, and write accesses
–
=,
≠
,
≥
, or
≤
comparison (in XS, only =,
≠
)
•
At least two trigger combination registers
•
Hardware breakpoints using the CPU stop reaction
•
At least one 40-bit cycle counter
•
Enhanced clock control with individual control of module clocks
574
Embedded Emulation Module (EEM)
SLAU272C – May 2011 – Revised November 2013
Copyright © 2011–2013, Texas Instruments Incorporated