Texas Instruments MSP430FR57 Series, User Manual, Page: 363 / 578

TBIFG
0h
TBR
(max)
Output Mode 2: Toggle/Reset
Output Mode 6: Toggle/Set
TBxCL0
TBxCL1
EQU1
TBIFG
Interrupt Events
EQU1
EQU0
EQU1 EQU1
EQU0
TBxCL3
EQU3 EQU3 EQU3 EQU3
Dead Time
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Timer_B Operation
If the timer is counting in the up direction when the new period is latched into TBxCL0, and the new period
is greater than or equal to the old period or greater than the current count value, the timer counts up to the
new period before counting down. When the timer is counting in the up direction, and the new period is
less than the current count value when TBxCL0 is loaded, the timer begins counting down. However, one
additional count may occur before the counter begins counting down.
12.2.3.5 Use of Up/Down Mode
The up/down mode supports applications that require dead times between output signals (see
Section 12.2.5 ). For example, to avoid overload conditions, two outputs driving an H-bridge must never be
in a high state simultaneously. In the example shown in Figure 12-9 , the t
dead
is:
t
dead
= t
timer
× (TBxCL1 – TBxCL3)
Where:
t
dead
= Time during which both outputs need to be inactive
t
timer
= Cycle time of the timer clock
TBxCLn = Content of compare latch n
The ability to simultaneously load grouped compare latches ensures the dead times.
Figure 12-9. Output Unit in Up/Down Mode
12.2.4 Capture/Compare Blocks
Up to seven identical capture/compare blocks, TBxCCRn (where n = 0 to 6), are present in Timer_B. Any
of the blocks may be used to capture the timer data or to generate time intervals.
12.2.4.1 Capture Mode
The capture mode is selected when CAP = 1. Capture mode is used to record time events. It can be used
for speed computations or time measurements. The capture inputs CCIxA and CCIxB are connected to
external pins or internal signals and are selected with the CCIS bits. The CM bits select the capture edge
of the input signal as rising, falling, or both. A capture occurs on the selected edge of the input signal. If a
capture is performed:
• The timer value is copied into the TBxCCRn register.
• The interrupt flag CCIFG is set.
The input signal level can be read at any time via the CCI bit. Devices may have different signals
connected to CCIxA and CCIxB. See the device-specific data sheet for the connections of these signals.
363 SLAU272C – May 2011 – Revised November 2013 Timer_B
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