mov #2,R6
nop
State Storage Window Displays:
LABEL mov #1,R5
dec R4
jnz LABEL
mov #1,R5
nop
Workaround
None
Note: This erratum affects the trace buffer display only. It does not affect code execution in
debugger or free run mode
CPU40
CPU Module
Category
Compiler-Fixed
Function
PC is corrupted when executing jump/conditional jump instruction that is followed by
instruction with PC as destination register or a data section
Description
If the value at the memory location immediately following a jump/conditional jump
instruction is 0X40h or 0X50h (where X = don't care), which could either be an instruction
opcode (for instructions like RRCM, RRAM, RLAM, RRUM) with PC as destination
register or a data section (const data in flash memory or data variable in
RAM), then the PC value is auto-incremented by 2 after the jump instruction is executed;
therefore, branching to a wrong address location in code and leading to wrong program
execution.
For example, a conditional jump instruction followed by data section (0140h).
@0x8012 Loop DEC.W R6
@0x8014 DEC.W R7
@0x8016 JNZ Loop
@0x8018 Value1 DW 0140h
Workaround
In assembly, insert a NOP between the jump/conditional jump instruction and program
code with instruction that contains PC as destination register or the data section.
Refer to the table below for compiler-specific fix implementation information.
IDE/Compiler
Version Number
Notes
IAR Embedded Workbench
IAR EW430 v5.51 or later
For the command line version add
the following information Compiler:
--hw_workaround=CPU40
Assembler:-v1
TI MSP430 Compiler Tools (Code
Composer Studio)
v4.0.x or later
User is required to add the compiler
or assembler flag option below. --
silicon_errata=CPU40
MSP430 GNU Compiler (MSP430-
GCC)
Not affected
Advisory Descriptions
SLAZ500AC – JANUARY 2013 – REVISED MAY 2021
MSP430F67451 Microcontroller
11
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