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TCK
GND
TEST/VPP
VCC TOOL
VCC TARGET
J2 (see Note A)
V
CC
R1
47 k
(see Note B)
W
C2
10 µF
C3
0.1 µF
V /AV /DV
CC
CC
CC
RST/NMI/SBWTDIO
MSP430Fxxx
C1
2.2 nF
(see Note B)
TEST/SBWTCK
V /AV /DV
SS
SS
SS
J1 (see Note A)
JTAG
TDO/TDI
1
3
5
7
9
11
13
2
4
6
8
10
12
14
R2
330
(see Note C)
W
3.2
External Power
External Power
A
Make either connection J1 (if a local target power supply is used) or connection J2 (if powering the from the
debug/programming adapter).
B
Note that the device RST/NMI/SBWTDIO pin is used in 2-wire Spy-Bi-Wire mode for bi-directional debug
communication with the device and that any capacitance attached to this signal may affect the ability to establish a
connection with the device. The upper limit for C1 is 2.2 nF when using current TI FET Interface modules (USB FET).
C
R2 is used to protect the JTAG debug interface TCK signal against the JTAG security fuse blow voltage that is
supplied by the TEST/VPP pin during the fuse blow process. In the case that fuse blow functionality is not needed, R2
is not required (becomes 0
Ω
) and the connection TEST/VPP must not be made.
Figure 3-2. Signal Connections for 2-Wire Spy-Bi-Wire Communication
The PC parallel port can source only a limited amount of current. Because of the ultralow-power capability
of the MSP430, a standalone FET does not exceed the available current. However, if additional circuitry is
added to the tool, this current limit could be exceeded. In this case, external power can be supplied to the
tool via connections provided on the MSP-FET430X110 and the target socket modules. See the
schematics of the MSP-FET430X110 and the target socket modules in
to locate the external
power connectors.
The MSP-FET430UIF can supply targets with up to 100 mA through pin 2 of the 14-pin connector. V
CC
for
the target can be selected between 1.8 V and 3.6 V in steps of 0.1 V. Alternatively, the target can be
supplied externally. In this case, the external voltage should be connected to pin 4 of the 14-pin connector.
The MSP-FET430UIF then automatically adjusts the level of the JTAG signals to external V
CC
. Only pin 2
(if MSP-FET430UIF supplies target) or pin 4 (if target is externally supplied) must be connected, not both
at the same time.
When an MSP-FET430X110 is powered from an external supply, an on-board device regulates the
external voltage to the level required by the MSP430.
26
Design Considerations for In-Circuit Programming
SLAU138F – June 2004 – Revised March 2007
