6.2 PCB Layer Diagram
Figure 6-4. Layout of Top Layer, Layer 1
Figure 6-5. Layout of Ground layer 1, Layer 2
Figure 6-6. Layout of Signal Layer 1, Layer 3
Figure 6-7. Layout of Signal Layer 2, Layer 4
Figure 6-8. Layout of Ground Layer 2, Layer 5
Figure 6-9. Layout of Bottom Layer, Layer 6
Schematics, Layout and BOM
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LP877451Q1EVM Evaluation Module
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