Texas Instruments LMX2572EVM User Manual Download Page 14 | Manualshive

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SNAU217A – August 2017 – Revised November 2017

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Copyright © 2017, Texas Instruments Incorporated

LMX2572EVM Evaluation Instructions

Figure 20. LMX2572EVM Schematic (Page 2)

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Summary of Contents for LMX2572EVM

Page 1: ...er that can generate any frequency from 12 5 MHz to 6 4 GHz without using an internal VCO doubler The PLL delivers excellent performance while consuming just 75 mA from a single 3 3 V supply Contents 1 LMX2572EVM Evaluation Module 3 2 Setup 3 3 Typical Measurement 5 4 Schematic 13 5 PCB Layout and Layer Stack up 15 6 Bill of Materials 18 7 Troubleshooting Guide 19 Appendix A Using Different Refere...

Page 2: ... Top Layer 15 23 GND Layer 16 24 Power Layer 16 25 Bottom Layer 17 26 Troubleshooting Guide 19 27 Output Termination Schematic 22 28 Default Output Phase Nosie 23 29 Default Output Waveform 23 30 Firmware Requirement 23 31 Firmware Loader 24 32 BSL Button 24 33 Update Firmware 25 34 Firmware Update Completed 25 35 USB Communications 26 List of Tables 1 Loop Filter Configuration 5 2 Phase Adjustmen...

Page 3: ... 10 pin ribbon cable 1 2 Evaluation Setup Requirement The evaluation will require the following hardware and software A DC power supply A spectrum analyzer or a signal analyzer A PC running Windows 7 or more recent version An oscilloscope optional A high quality signal generator optional Texas Instruments Clocks and Synthesizers TICS Pro software Texas Instruments PLLatinum Simulator Tool optional...

Page 4: ... for details Terminate the unused output of the Reference PRO board with a 50 Ω resistor or SMA load By default the output clock from Reference PRO is a 100 MHz LVPECL clock Appendix B has the details of Reference PRO 2 4 RF Output Connect either RFoutAP or RFoutAM SMA connector to a signal analyzer The unused connector must be terminated with a 50 Ω resistor or SMA load Output frequency is 3 GHz ...

Page 5: ...D1 By default both switches are in the Make position To read back register in TICS Pro set Switch 2 to the Break position Figure 4 MUXout_SW Switch 3 Typical Measurement 3 1 Default Configuration 3 1 1 Loop Filter The parameters for the loop filter are Table 1 Loop Filter Configuration PARAMETER VALUE VCO frequency Designed for 6 GHz but works over the whole frequency range VCO gain 66 MHz V Effec...

Page 6: ...ilter 3 1 2 Typical Output 1 Follow Section 2 to setup the evaluation 2 Click Write All Registers to write all the registers to LMX2572 Default output is 3 GHz Figure 6 Default Output 3 2 Additional Tests 3 2 1 Phase Adjustment The phase of the RF output signal can be adjusted as follows Phase shift in degree 360 MASH_SEED PLL_DEN P CHDIV where P 2 when VCO_PHASE_SYNC_EN 1 else P 1 Here is an exam...

Page 7: ...360 800 1000 1 32 9 We can write 800 to MASH_SEED 40 times to get 360 phase shift Figure 7 Phase Adjustment Setting Figure 8 Phase Adjustment 3 2 2 Calibration free Automatic Ramping LMX2572 supports linear frequency ramp without the need of VCO calibration in the middle of the ramp The output waveform is a continuous frequency sweep between the start and the end frequencies However the frequency ...

Page 8: ...Hz Phase detector frequency 50 MHz Ramp up down time 200 µs RAMP_LIMIT_HIGH 4995 MHz RAMP_LIMIT_LOW 4595 MHz This is a triangular ramp example Ramp up is defined by RAMP0 while ramp down is defined by RAMP1 RAMP_THRESH RAMP_DLY_CNT and RAMP_SCALE_COUNT are don t care because we are not going to trigger any VCO calibration RAMP_MANUAL 0 means Automatic Ramping mode Set RAMP_EN 1 to start ramping Se...

Page 9: ... in the middle of the ramp because of VCO calibrations which are required so as to ensure the continuity of the ramp Table 4 Automatic Ramp Example PARAMETER EXAMPLE VALUE Ramping start frequency 4740 MHz Ramping stop frequency 4860 MHz Phase detector frequency 50 MHz Ramp up down time 1000 µs RAMP_LIMIT_HIGH 5060 MHz RAMP_LIMIT_LOW 4540 MHz fOSCin 100 MHz CAL_CLK_DIV 0 RAMP_THRESH 40 MHz Pause ti...

Page 10: ...B of LMX2572 can be used to generate or duplicate SYSREF signal The output of RFoutB can be a single pulse series of pulse or a continuous stream of pulses These pulses are synchronous with the RFoutA signal with an adjustable delay To use the SYSREF capability the PLL must be in SYNC mode with VCO_PHASE_SYNC_EN 1 Here is an example of Pulsed mode Figure 13 SYSREF Pulsed Mode Setting Figure 14 SYS...

Page 11: ... 8 level FSK modulation while FSK SPI FAST mode supports arbitrary level FSK modulation The followings is an FSK SPI FAST mode example Table 5 FSK SPI FAST Mode Example PARAMETER EXAMPLE VALUE Phase detector frequency 100 MHz CHDIV 8 PLL_DEN 8000000 FSK_DEV_SCALE 1 Frequency deviation 648 Hz 1944 Hz Keep writing to the FSK_SPI_FAST_DEV register field the correct values the output of LMX2572 is a d...

Page 12: ...on Instructions 3 2 6 Register Readback To read back the written register values 1 Set MUXout_SW Switch 2 to Break position See Section 2 7 1 for details 2 In TICS Pro set MUXOUT_LD_SEL to Readback Figure 17 Readback Setting 3 Click on the Register Name that you want to read back 4 Click the Read Register button to read back the register value Figure 18 Register Readback ...

Page 13: ...hematic 13 SNAU217A August 2017 Revised November 2017 Submit Documentation Feedback Copyright 2017 Texas Instruments Incorporated LMX2572EVM Evaluation Instructions 4 Schematic Figure 19 LMX2572EVM Schematic Page 1 ...

Page 14: ...ic www ti com 14 SNAU217A August 2017 Revised November 2017 Submit Documentation Feedback Copyright 2017 Texas Instruments Incorporated LMX2572EVM Evaluation Instructions Figure 20 LMX2572EVM Schematic Page 2 ...

Page 15: ...d Layer Stack up 15 SNAU217A August 2017 Revised November 2017 Submit Documentation Feedback Copyright 2017 Texas Instruments Incorporated LMX2572EVM Evaluation Instructions 5 PCB Layout and Layer Stack up 5 1 PCB Layer Stack up The top layer is 1 oz copper Figure 21 PCB Layer Stack Up 5 2 PCB Layout Figure 22 Top Layer ...

Page 16: ...r Stack up www ti com 16 SNAU217A August 2017 Revised November 2017 Submit Documentation Feedback Copyright 2017 Texas Instruments Incorporated LMX2572EVM Evaluation Instructions Figure 23 GND Layer Figure 24 Power Layer ...

Page 17: ...m PCB Layout and Layer Stack up 17 SNAU217A August 2017 Revised November 2017 Submit Documentation Feedback Copyright 2017 Texas Instruments Incorporated LMX2572EVM Evaluation Instructions Figure 25 Bottom Layer ...

Page 18: ...5 C2012X5R1C226K125AC TDK Css 1 CAP CERM 3300 pF 50 V 5 C0G NP0 0603 GRM1885C1H332JA01D MuRata D1 1 LED Green SMD LTST C190GKT Lite On L1_TPS 1 Inductor Shielded Composite 2 2 µH 3 7 A 0 02 Ω SMD XFL4020 222MEB Coilcraft MUXout_SW 1 Switch SPST Slide Off On 2 Pos 0 1 A 20 V SMD 219 2MST CTS Electrocomponents OSCinM OSCinP SYNC SysRef Vcc 5 Connector SMT End launch SMA 50 Ω 142 0701 851 Emerson Net...

Page 19: ... Verify communications x R WR 86 RPPXQLFDWLRQV QWHUIDFH ensure that the USB2ANY button is turned green OLFN GHQWLI WR have the program blink the green LED x Send simple one way communication to the device such as POWERDOWN RESET or change the status of a pin Realize that if a RESET is done do a Ctrl L to refresh the registers afterwards For POWERDOWN you can validate this looking at the current on...

Page 20: ...e Clock Appendix A SNAU217A August 2017 Revised November 2017 Using Different Reference Clock There are different options to provide a reference clock to LMX2572EVM By default the EVM is configured for an external single ended clock Table 7 Reference Clock Input Configuration INPUT EXTERNAL CLOCK CRYSTAL OSCILLATOR Single ended Differential LVDS ...

Page 21: ...are configurable through the jumpers by strapping the center pin to Vdd position or GND position Connections from the Vdd position to the device supply or from the GND position to the ground plane are connected by 1 5 kΩ resistors By default the board is configured for 100 MHz LVPECL output The power supply to Reference PRO is obtained from the PC that is connecting to Reference PRO through the US...

Page 22: ... shown inTable 10 1 50 Ω to VCC 2 V termination is required on receiver 2 100 Ω differential termination R31 is provided onboard Removing this termination is possible if the differential termination is available on the receiver Table 10 Output Termination Configuration OUTPUT FORMAT COUPLING COMPONENT VALUE LVPECL AC Default configuration R15 R28 0 Ω R26 R29 150 Ω C24 C25 0 01 µF R27 R30 R31 DNP D...

Page 23: ...rm B 4 Firmware Update Usually when the Reference PRO board is used at the first time TICS Pro will request for a firmware update Simply follow the pop up instructions to complete the update This is necessary to ensure that the USB connection between the PC and the Reference PRO board is properly setup otherwise the programming to LMX2572EVM will not be successful 1 When you see this message click...

Page 24: ...ber 2017 Submit Documentation Feedback Copyright 2017 Texas Instruments Incorporated Reference PRO Figure 31 Firmware Loader 3 The BSL button is located next to the USB connector Figure 32 BSL Button 4 Follow the on screen procedure until the below screen is pop up ...

Page 25: ...ments Incorporated Reference PRO Figure 33 Update Firmware 5 Click the Upgrade Firmware button the firmware will be upgrading Click the Close button after it is done Figure 34 Firmware Update Completed 6 Check the USB connection in TICS Pro by clicking USB communications Interface Make sure the USB Connected button is turned green ...

Page 26: ...Firmware Update www ti com 26 SNAU217A August 2017 Revised November 2017 Submit Documentation Feedback Copyright 2017 Texas Instruments Incorporated Reference PRO Figure 35 USB Communications ...

Page 27: ...us revisions may differ from page numbers in the current version Changes from Original August 2017 to A Revision Page Added phase adjustment example 6 Added calibration free ramping example 7 Added automatic ramp example 9 Added SYSREF example 10 Added FSK modulation example 11 Added register readback example 12 Added troubleshooting guide 19 Changed the graphic of single ended input with crystal ...

Page 28: ...y set forth above or credit User s account for such EVM TI s liability under this warranty shall be limited to EVMs that are returned during the warranty period to the address designated by TI and that are determined by TI not to conform to such warranty If TI elects to repair or replace such EVM TI shall have a reasonable time to repair such EVM or provide replacements Repaired EVMs shall be warr...

Page 29: ...the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated Antenna types not included in this list having a gain greater than the maximum gain indicated for that type are strictly prohibited for use with this device Concernant les EVMs avec antennes détachables Conformément à la réglementation d Industrie Canada le présent émetteur radio peut fo...

Page 30: ...ed loads Any loads applied outside of the specified output range may also result in unintended and or inaccurate operation and or possible permanent damage to the EVM and or interface electronics Please consult the EVM user guide prior to connecting any load to the EVM output If there is uncertainty as to the load specification please contact a TI field representative During normal operation even ...

Page 31: ...COST OF REMOVAL OR REINSTALLATION ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES RETESTING OUTSIDE COMPUTER TIME LABOR COSTS LOSS OF GOODWILL LOSS OF PROFITS LOSS OF SAVINGS LOSS OF USE LOSS OF DATA OR BUSINESS INTERRUPTION NO CLAIM SUIT OR ACTION SHALL BE BROUGHT AGAINST TI MORE THAN TWELVE 12 MONTHS AFTER THE EVENT THAT GAVE RISE TO THE CAUSE OF ACTION HAS OCCURRED 8 2 Specif...

Page 32: ... TI Resource NO OTHER LICENSE EXPRESS OR IMPLIED BY ESTOPPEL OR OTHERWISE TO ANY OTHER TI INTELLECTUAL PROPERTY RIGHT AND NO LICENSE TO ANY TECHNOLOGY OR INTELLECTUAL PROPERTY RIGHT OF TI OR ANY THIRD PARTY IS GRANTED HEREIN including but not limited to any patent right copyright mask work right or other intellectual property right relating to any combination machine or process in which TI product...

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