3.5.2 External Clock Input
Another option is to feed an external clock to the SMA ports (J8) to drive the XO_P input. See
. This
path can be connected to the XO_P input pins. Y1 should be powered down when using the external XO input
path.
3.6 Reference Clock Inputs
The LMK5C33216 has two DPLL reference clock input pairs (IN0_P/N and IN1_P/N) with configurable input
priority and input selection modes. The inputs have programmable input type, termination, and biasing options to
support any clock interface type.
External LVCMOS or Differential reference clock inputs can be applied to the SMA ports, labeled IN0_P/N and
IN1_P/N. All SMA inputs are routed through 50-Ω single-ended traces and DC coupled to the corresponding
IN0_P/N and IN1_P/N pins of the DUT. Single ended singles should be connected to the non-inverting input,
IN0_P or IN1_P.
3.7 Clock Outputs
The LMK5C33216 has 16 clock output pairs (OUT[0:15]_P/N).
Output clocks are AC-coupled to the SMA ports labeled OUT[0:15]_P/N.
3.8 Status Outputs and LEDS
Status outputs signals can be configured on the GPIO0, GPIO1, and GPIO2 pins. The status output signal,
output type (3.3-V LVCMOS or NMOS open-drain).
3.9 Requirements for Making Measurements
When performing measurements with the LMK5C33216EVM, the following procedures must be completed:
1. Ensure all required outputs have proper termination components installed to match the desired output types.
Recommended output terminations for each output type are shown in
.
LMK5C33216
Output Driver
Oscilloscope
100
Internal input biasing
R
B
R
B
Driver
LVDS
CML*
LVPECL
HCSL
R
B
( )
open
open
120
50
*CML driver has 50-
pull-up
Figure 3-11. Output Termination Recommendations
2. Ensure all enabled outputs that are not connected to any test equipment have a 50 Ω SMA termination. An
example of a 50 Ω SMA termination is shown in
Figure 3-12. 50 Ω SMA Termination
EVM Configuration
AD
V
A
NCE INFO
R
MA
TION
SNAU260A – OCTOBER 2020 – REVISED FEBRUARY 2021
LMK5C33216EVM User's Guide
13
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