6 Input Clock
The LMK1D1208I can receive either a differential or single-ended clock as input. The default board configuration
is for an LVDS differential signal at both device inputs. The inputs can be applied through the SMAs:
J1, J2
(IN0_P, IN0_N) or
J3, J4
(IN1_P, IN1_N). These inputs are AC-coupled to the device. The common-mode
voltage is provided by the device on-chip bias generator (V
AC_REF
pins), which can be measured at
TP1
and
TP2
.
Figure 6-1. Input Clock Selection Layout
6.1 Differential Input
By default, the clock inputs are configured as AC-coupled LVDS inputs with VAC_REF connection.
Input Clock
6
LMK1D1208IEVM User's Guide
SNAU270 – FEBRUARY 2022
Copyright © 2022 Texas Instruments Incorporated
