Texas Instruments LMK00105, User Manual, Page: 3 / 11

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Quick Start Setup
3 SNLU097A – March 2012 – Revised July 2019
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LMK00105 User’s Guide
2.1 Quick Start Description
The LMK00105 EVK allows full verification of the device functionality and performance specifications. To
quickly set up and operate the board with basic equipment, refer to the quick start procedure below and
test setup shown in
Figure 1 .
1. 1. Verify the output mode control switches, S1[1:4], match the states shown in Table 2 to reflect the
default output clock interfaces configured on the EVK.
Table 2. Default Clock Output Modes / Interfaces
SW POSITION/NAME SW STATE
S1[1]/SEL 0 (OFF)
S1[2]/NC Unused
S1[3]/OE 1 (OFF)
S1[4]/NC Unused
2. 2. Connect the Vdd SMA from the board to a 3.3 V source. This powers the core portions of the
LMK00105.
3. 3. Connect the Vddo SMA from the board to a 3.3 V source. This powers the output drivers of the
LMK00105
4. 4. Set the desired clock input using the input selection control switches, S1[1], per Table 3. A
differential clock source can be connected to SMAs CLKin/CLKin*.
Table 3. Input Selection (0=SW OFF, 1=SW ON)
SELECTED INPUT DEFAULT INPUT MODE S1CLKin_Sel State
CLKin/CLKin* Differential clock 0
OSCin Select OSCin 1
Note: CLKin path is configured by default to receive a differential clock as the input. The SMA input is
AC coupled to the device inputs and terminated with 100
Ω differential. Refer to the Clock Inputs
section to configure the EVK for a single-ended input.
5. 5. Connect and measure any clock output SMA labeled CLKoutX to an oscilloscope or other test
instrument using SMA cable(s). The output clock will be level-translated/buffered copy of the selected
clock input or crystal oscillator. Note: All output clocks are AC-coupled to the SMA connectors to
ensure safe use with RF instruments.
Note: Switching noise from one or more un-terminated outputs may impair the signal quality of the
measured output(s). To minimize switching noise and EMI, properly terminate any unused output path
using an SMA load or the component options near the SMA outputs, or alternatively, remove the 0
Ω
series resistor nearest the unused output pin.
3 Signal Path and Control Switches
The LMK00105 supports single-ended or differential clocks on CLKin. A second input, OSCin, has an
integrated crystal oscillator interface that supports a fundamental mode, AT-cut crystal or an external
single- 4 LMK00105 Users Guide SNLU097 March 2012 ended clock. The two-input multiplexer is pin-
controlled. To achieve the maximum operating frequency and lowest additive jitter, it is recommended to
use a differential clock with high input slew rate (>1 V/ns) and DC coupling to the CLKin port.
All control pins are configured with the control switch, S3. The output enable logic is shown in Table 4 .
Table 4. Output Enable Selection (0=OFF, 1=ON)
CLKout ENABLE MODE S1[3]-OE
Disabled/Hi-Z 0
Enabled 1