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SNLU097A – March 2012 – Revised July 2019

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Copyright © 2012–2019, Texas Instruments Incorporated

LMK00105 User’s Guide

User's Guide

SNLU097A – March 2012 – Revised July 2019

LMK00105 User’s Guide

This user guide describes how to set up and operate the LMK00105 evaluation board kit (EVK). The
LMK00105 is a high performance, low noise, low voltage CMOS fanout buffer. The core voltage can be
2.5 or 3.3 volts, while the power supply for the outputs can be selected from: 1.5 V, 1.8 V, 2.5 V, or 3.3 V,
provided that it does not exceed the core supply voltage™

Contents

1

Introduction

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2

2

Quick Start Setup

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2

2.1

Quick Start Description

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3

3

Signal Path and Control Switches

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3

4

Power Supplies

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4

5

Clock Inputs

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4

5.1

Crystal Oscillator Interface

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4

5.2

Configuring OSCin for a Crystal Mode

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4

6

Clock Outputs

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4

7

Schematics

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5

8

PCB Layout

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7

9

Bill of Materials

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9

List of Figures

1

LMK00105 Quick Start Setup

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2

2

Schematic Sheet 1

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5

3

Schematic Sheet 2

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6

4

PCB Top

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7

5

Bottom Side (Layer Inverted, Not to Scale)

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8

List of Tables

1

Part Description

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2

2

Default Clock Output Modes / Interfaces

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3

3

Input Selection (0=SW OFF, 1=SW ON)

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3

4

Output Enable Selection (0=OFF, 1=ON)

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3

5

Power Supply Configuration

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4

6

Bill of Materials

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Summary of Contents for LMK00105

Page 1: ... provided that it does not exceed the core supply voltage Contents 1 Introduction 2 2 Quick Start Setup 2 2 1 Quick Start Description 3 3 Signal Path and Control Switches 3 4 Power Supplies 4 5 Clock Inputs 4 5 1 Crystal Oscillator Interface 4 5 2 Configuring OSCin for a Crystal Mode 4 6 Clock Outputs 4 7 Schematics 5 8 PCB Layout 7 9 Bill of Materials 9 List of Figures 1 LMK00105 Quick Start Setu...

Page 2: ...105 User s Guide 1 Introduction This user guide describes how to set up and operate the LMK00105 evaluation board kit EVK The LMK00105 is a high performance low noise low voltage CMOS fanout buffer The core voltage can be 2 5 or 3 3 volts while the power supply for the outputs can be selected from 1 5 V 1 8 V 2 5 V or 3 3 V provided that it does not exceed the core supply voltage Table 1 Part Desc...

Page 3: ...s AC coupled to the device inputs and terminated with 100 Ω differential Refer to the Clock Inputs section to configure the EVK for a single ended input 5 5 Connect and measure any clock output SMA labeled CLKoutX to an oscilloscope or other test instrument using SMA cable s The output clock will be level translated buffered copy of the selected clock input or crystal oscillator Note All output cl...

Page 4: ...r CLKin or CLKin may be driven single ended 5 1 Crystal Oscillator Interface The LMK00105 has an integrated crystal oscillator interface OSCin OSCout that supports a fundamental mode AT cut crystal If the crystal input is selected an optional onboard crystal on either footprint Y1 or Y2 will start up and the oscillator clock can be measured on any enabled output A crystal with the HC49 footprint c...

Page 5: ... 51 R24 DNP VDDO VDDO GND VDD VDDO 5 6pF C10 DNP 5 6pF C12 DNP 0 R9 DNP 0 R14 DNP 1 2 3 4 5 OSCin 142 0701 851 0 1 F μ C15 51 R20 GND GND 40 MHz Y1 DNP 0 R19 0 R18 GND 0 1 F μ C9 0 1 F μ C11 Y2 DNP GND 51 R25 DNP 0 1 F μ C3 0 1 F μ C1 0 1 F μ C2 GND GND GND 1 2 3 4 5 CLKout3 142 0701 851 GND 1 2 3 4 5 CLKout2 142 0701 851 GND 1 2 3 4 5 CLKout4 142 0701 851 GND 0 1 F μ C18 1 2 3 4 5 CLKout0 142 070...

Page 6: ...Vdd_In IN 4 ADJ 6 GND 3 NC 7 SD 8 DAP 9 OUT 5 BYP 1 NC 2 U3 LP3878SD ADJ NOPB DNP 10 F μ C23 1 F μ C24 0 01 F μ C25 GND VDD 10 F μ C304 DNP 10 F μ C306 DNP 2200pF C305 DNP 0 01 F μ C307 DNP 51k R310 DNP 2 00k R312 DNP 866 R311 DNP GND GND GND GND TP_VDD_LDO TP_Vdd TP_Vdd_In 0 R31 DNP 0 R309 DNP IN 4 ADJ 6 GND 3 NC 7 SD 8 DAP 9 OUT 5 BYP 1 NC 2 U2 LP3878SD ADJ NOPB DNP 10 F μ C300 DNP 10 F μ C302 D...

Page 7: ...www ti com PCB Layout 7 SNLU097A March 2012 Revised July 2019 Submit Documentation Feedback Copyright 2012 2019 Texas Instruments Incorporated LMK00105 User s Guide 8 PCB Layout Figure 4 PCB Top ...

Page 8: ...yout www ti com 8 SNLU097A March 2012 Revised July 2019 Submit Documentation Feedback Copyright 2012 2019 Texas Instruments Incorporated LMK00105 User s Guide Figure 5 Bottom Side Layer Inverted Not to Scale ...

Page 9: ...m 5 0 1W 0603 1 R20 Vishay Dale 11 DIP Switch 4 position slide actuatoor SPST SMD 1 S1 Omron Electronic Components 12 0 375 Standoff 6 SO1 SO2 SO3 SO4 SO5 SO6 13 Testpoint NA TP_Vdd TP_Vdd_In TP_VDD_LDO TP_Vddo TP_VDDO_LDO NA 14 LMK00105 1 U1 Texas Instruments 15 CAP CERM 5 6pF 50V 5 C0G NP0 0603 0 C10 C12 AVX 16 CAP CERM 10uF 10V 10 X5R 0805 0 C300 C302 C304 C306 MuRata 17 CAP CERM 2200pF 100V 5 ...

Page 10: ...cumentation Feedback Copyright 2012 2019 Texas Instruments Incorporated Revision History Revision History NOTE Page numbers for previous revisions may differ from page numbers in the current version Changes from Original March 2012 to A Revision Page Changed document throughout 2 ...

Page 11: ...se resources are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and display of these resources is prohibited No license is granted to any other TI intellectual property right or to any third party intellectual property right TI disclaims responsibility for...

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