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EVM Layout

23

SNAU205A – March 2017 – Revised August 2019

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Copyright © 2017–2019, Texas Instruments Incorporated

LMH1297EVM Evaluation Board

9

EVM Layout

The following figures show the LMH1297EVM layout. The evaluation board controls signal integrity control
settings through jumper pins.

The LMH1297EVM allows access to all input channels ( and IN0±) and output channels
(, OUT0±, and ). It is very compact and low power. The QFN package offers an
exposed thermal pad to enhance electrical and thermal performance. This must be soldered to the copper
landing on the PWB.

Figure 25. LMH1297EVM Top Layer

Figure 26. LMH1297EVM Bottom Layer

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Summary of Contents for LMH1208

Page 1: ...des of Operation 5 5 2 Software Hardware Description and Setup 7 5 3 Retimed Output at 11 88 Gbps 5 94 Gbps 2 97 Gbps 1 485 Gbps and 270 Mbps 11 6 SigCon Architect LMH1297 GUI Profile 13 6 1 Configuration Page 13 6 2 Low Level Page 14 6 3 High Level Page 15 6 4 Eye Monitor Page 18 7 Bill Of Materials 19 8 Schematics 21 9 EVM Layout 23 List of Figures 1 LMH1297EVM 2 2 LMH1297EVM Input and Output Pi...

Page 2: ...7 22 LMH1297EVM Eye Monitor Page 18 23 LMH1297 Schematic Page 21 24 MSP430 USB2ANY Schematic Page 22 25 LMH1297EVM Top Layer 23 26 LMH1297EVM Bottom Layer 23 List of Tables 1 LMH1297 Ordering Information 3 2 Description of 4 Level Voltage Inputs and Jumper Ties 5 3 Description of Connections in SPI Mode MODE_SEL Level F 6 4 Description of Connections in SMBus Mode MODE_SEL Level L 7 5 Input and Ou...

Page 3: ...SDI_IO 100 Ω Output Driver With De Emphasis on OUT0 Line Side Reclocked 75 Ω Loop Through Output on SDI_OUT CD Cable Driver Mode PCB Equalizer at 100 Ω Differential Input on IN0 Dual Cable Drivers with Integrated Reclocker and Pre Emphasis on SDI_IO and SDI_OUT Host Side Reclocked 100 Ω Loop Back Output on OUT0 Programmable Through Pins SPI or SMBus Interface Single Supply Operation VDD 2 5 V 5 40...

Page 4: ...eedback Copyright 2017 2019 Texas Instruments Incorporated LMH1297EVM Evaluation Board 5 Setup This section describes the jumpers and connectors on the EVM as well as how to connect set up and use the LMH1297EVM When operating the LMH1297EVM signal inputs and outputs can be connected as shown in Figure 2 Figure 2 LMH1297EVM Input and Output Pins ...

Page 5: ...er on J31 NOTE Currently the interface from PC to on board MSP430 can only support SMBus communication The external control pins on the LMH1297EVM are used to configure the default device settings A 4 level input scheme across the control pin interface increases the amount of control levels available to the device with fewer physical pins The channel settings and controls are configurable in pin m...

Page 6: ...PI mode install Pin 1 2 3 4 and 5 6 for SPI 3 3 V to 2 5 V level shift Leave Pin 7 10 open See the data sheet for additional information on SPI operation J10 EQ_CD_SEL EQ_CD_SEL pin selects the I O direction See the data sheet and EVM schematic for additional operation information J11 OUT0_SEL OUT0_SEL pin enables or disables the OUT0 100 Ω output See datasheet and EVM schematic for additional ope...

Page 7: ...A 5 2 Software Hardware Description and Setup By factory default the LMH1297EVM is configured in CD Mode to accept a valid SDI signal on IN0 and output the retimed data on OUT0 SDI_IO and SDI_OUT without programming the LMH1297 beforehand The LMH1297EVM can also be configured by the user to operate in EQ Mode The general procedure for setting up and testing with the LMH1297EVM is as follows For ha...

Page 8: ...eye diagram Alternatively this 100 Ω output can be used as the source for another SDI cable driver 3 The output signals on J20 and J21 are dual cable driver outputs SDI_IO on J20 can be connected with 75 Ω coax cable to a video pattern analyzer while the secondary SDI_OUT output on J21 can be used as a duplicate cable driver output 4 EQ Mode Only Connect the LMH1297EVM to the system under test 1 T...

Page 9: ...onfigured as output x SDI_IO EQ automatically powered down J11 OUT0_SEL Level L x OUT0 powered up and enabled J12 HOST_EQ0 Level F x IN0 EQ set to normal adaptive operation x Set OUT0 VOD 570 mVpp DE 0 4 dB J13 MODE_SEL Level L x Operate in SMBus Mode J14 OUT_CTRL Level F x Reclocked data path EQ and Reclocker Enabled on both OUT0 and SDI_OUT J15 SDI_VOD Level F x Output nominal VOD on SDI_IO and ...

Page 10: ... Level L x OUT0 powered up and enabled x In EQ Mode OUT0 is always enabled J12 HOST_EQ0 Level F x IN0 EQ settings ignored since IN0 is powered down x Set OUT0 VOD 570 mVpp DE 0 4 dB J13 MODE_SEL Level L x Operate in SMBus Mode J14 OUT_CTRL Level F x Reclocked data path EQ and Reclocker Enabled on both OUT0 and SDI_OUT J15 SDI_VOD Level F x Output nominal VOD on SDI_OUT 800 mVpp J16 J17 ADDR0 ADDR1...

Page 11: ...ng conditions Input Signal PRBS 10 800 mVp p Launch Amplitude on IN0 VIN 2 5 V T 25 C The eye diagrams in the right column of this subsection show the reclocked output eye of differential OUT0 in EQ Mode under the following conditions Input Signal PRBS 10 800 mVp p Launch Amplitude on SDI_IO VIN 2 5 V T 25 C Figure 6 CD Mode at 11 88 Gbps Measured at SDI_IO Reclocked Output Figure 7 EQ Mode at 11 ...

Page 12: ... Mode at 2 97 Gbps Measured at SDI_IO Reclocked Output Figure 11 EQ Mode at 2 97 Gbps Measured at OUT0 Reclocked Output Figure 12 CD Mode at 1 485 Gbps Measured at SDI_IO Reclocked Output Figure 13 EQ Mode at 1 485 Gbps Measured at OUT0 Reclocked Output Figure 14 CD Mode at 270 Mbps Measured at SDI_IO Reclocked Output Figure 15 EQ Mode at 270 Mbps Measured at OUT0 Reclocked Output ...

Page 13: ...n Architect LMH12097 GUI In this page the user can control the following Change the Slave Address Toggle MSP430 LED Enable or Disable Demo Mode Figure 16 shows the Configuration Page Figure 16 LMH1297EVM Configuration Page To configure a live LMH1297 using the GUI the following steps should be taken 1 Connect the LMH1297EVM through a USB cable to the PC 2 Select the USB2ANY Device in the USB2ANY D...

Page 14: ...ection contains the three main register pages Shared Registers CTLE CDR Registers and Config IO Registers Within these register pages the following can be observed Name of each register Each register s address and default value Register accessibility as read only or read write The register value can be overwritten by typing the desired value in either the Data box or by clicking the appropriate ch...

Page 15: ...the user can easily control functions such as the following Configure the LMH1297 as CD or EQ Mode Power Up or Down Different Output Channels Modify the Signal Output from the Output Mux Reset the CDR Change the IN0 CTLE Index Boost Value NOTE Configuration pins SDI_OUT_SEL OUT0_SEL and EQ_CD_SEL will be overwritten with the default values displayed on the High Level Page when first loading SigCon...

Page 16: ...te Figure 19 shows the required syntax for the macro scripts Figure 19 Macro Utility Syntax NOTE All parameters on the text file should be separated by a tab in order for the Macro utility to identify and accept the format Figure 10 shows an example of a macro script that programs two LMH1297 devices one with SMBus Address 0x5C and another with SMBus Address 0x5A After this file is saved as a txt ...

Page 17: ...rchitect LMH1297 GUI Profile 17 SNAU205A March 2017 Revised August 2019 Submit Documentation Feedback Copyright 2017 2019 Texas Instruments Incorporated LMH1297EVM Evaluation Board Figure 21 Macro Utility Example Log File ...

Page 18: ...r Page The LMH1297 has on chip eye monitor that can be accessed on the Eye Monitor Page In this page the user can control the following Perform a single or continuous capture of the eye diagram Measure the HEO Horizontal Eye Opening in either time ps or unit intervals UI Measure the VEO Vertical Eye Opening Read back the detected data rate Figure 22 shows the Eye Monitor Page Figure 22 LMH1297EVM ...

Page 19: ...CAP CERM 2200pF 50V 10 X7R 0603 Kemet C0603X222K5RACTU 14 C33 1 CAP CERM 0 47uF 10V 10 X7R 0603 MuRata GRM188R71A474KA61D 15 D1 D3 2 LED Green SMD Lumex SML LX0603GW TR 16 D2 1 Diode Zener 7 5 V 550 mW SMB ON Semiconductor 1SMB5922BT3G 17 FB1 1 Ferrite Bead 60 ohm 100 MHz 0 8 A 0603 Taiyo Yuden BK1608HS600 T 18 FID1 FID2 FID3 FID4 FID5 FID6 6 Fiducial mark There is nothing to buy or mount N A N A ...

Page 20: ...CW04021K50JNED 40 R34 R36 2 RES 33k ohm 5 0 063W 0402 Vishay Dale CRCW040233K0JNED 41 R35 1 RES 1 2Meg ohm 5 0 1W 0603 Vishay Dale CRCW06031M20JNEA 42 R37 1 RES 200 ohm 1 0 1W 0603 Vishay Dale CRCW0603200RFKEA 43 R43 R44 445 R46 R47 R48 R49 R50 R51 R52 10 RES 20 0k ohm 1 0 063W 0402 Vishay Dale CRCW040220K0FKED 44 S1 1 Switch Tactile SPST NO SMT Panasonic EVQ PSD02K 45 SH J1 SH J2 SH J3 SH J4 SH J...

Page 21: ...0 1 2 3 4 5 6 J11 1 2 3 4 5 6 J12 1 2 3 4 5 6 J13 1 2 3 4 5 6 J14 1 2 J7 5 146278 2 1 2 3 4 5 J24 142 0771 821 1 2 3 4 5 J25 142 0771 821 1 2 3 4 5 J22 142 0771 821 1 2 3 4 5 J23 142 0771 821 1 2 J6 5 146278 2 GND 1 2 J4 5 146278 2 1 2 3 4 5 J20 BNC7T J P GN ST EM1D 75 0 R28 i 75 ohm single ended trace i 75 ohm single ended trace HOST_EQ0 ENABLE SDI_VOD GND 4 7µF C12 4 7µF C13 1 2 3 4 5 J21 BNC7T ...

Page 22: ...3 7 TB0OUTH SVMOUT 44 P4 0 PM_UCB1STE PM_UCA1CLK 45 P4 1 PM_UCB1SIMO PM_UCB1SDA 46 P4 2 PM_UCB1SOMI PM_UCB1SCL 47 P4 3 PM_UCB1CLK PM_UCA1STE 48 DVSS2 49 DVCC2 50 P4 4 PM_UCA1TXD PM_UCA1SIMO 51 P4 5 PM_UCA1RXD PM_UCA1SOMI 52 P4 6 PM_NONE 53 P4 7 PM_NONE 54 P5 6 TB0 0 55 P5 7 TB0 1 56 P7 4 TB0 2 57 P7 5 TB0 3 58 P7 6 TB0 4 59 P7 7 TB0CL K MCLK 60 VSSU 61 PU 0 DP 62 PUR 63 PU 1 DM 64 VBUS 65 VUSB 66 ...

Page 23: ...The evaluation board controls signal integrity control settings through jumper pins The LMH1297EVM allows access to all input channels SDI_IO and IN0 and output channels SDI_IO OUT0 and SDI_OUT It is very compact and low power The QFN package offers an exposed thermal pad to enhance electrical and thermal performance This must be soldered to the copper landing on the PWB Figure 25 LMH1297EVM Top L...

Page 24: ... Documentation Feedback Copyright 2017 2019 Texas Instruments Incorporated Revision History Revision History NOTE Page numbers for previous revisions may differ from page numbers in the current version Changes from Original March 2017 to A Revision Page Initial Public Release 3 ...

Page 25: ...other than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control techniques are used to the extent TI deems necessary TI does not test all parameters of each EVM User s claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects...

Page 26: ... These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instructions may cause harmful interference to radio communications However there is no guarantee that interference will not occur in a particular installation...

Page 27: ...y for convenience and should be verified by User 1 Use EVMs in a shielded room or any other test facility as defined in the notification 173 issued by Ministry of Internal Affairs and Communications on March 28 2006 based on Sub section 1 1 of Article 6 of the Ministry s Rule for Enforcement of Radio Law of Japan 2 Use EVMs only after User obtains the license of Test Radio Station as provided in R...

Page 28: ... any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electrical shock hazard User assumes all responsibility and liability for any improper or unsafe handling or use of the EVM by User or its employees affiliates contractors or designees 4 4 User assumes all...

Page 29: ...OR DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthermore no return of EVM s will be accepted if the package has been opened and no return of the EVM s will be accepted if they are damaged or otherwise not in a resalable condition If User feels it has...

Page 30: ...se resources are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and display of these resources is prohibited No license is granted to any other TI intellectual property right or to any third party intellectual property right TI disclaims responsibility for...

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